Assignee
MOTTAEZ AMIR H
US·6 granted patents·17 citations·filing 2010–2012
Technology mixG06F6
Top patents by PatentIndex Score
6 records- 0176US8707242B2Optimizing a circuit design for delay using load-and-slew-independent numerical delay modelsMOTTAEZ AMIR H·Filed 2012·Granted Apr 22, 2014·4 cites·20 claims
- 0275US9064073B2Hyper-concurrent optimization over multi-corner multi-mode scenariosMOTTAEZ AMIR H·Filed 2010·Granted Jun 23, 2015·4 cites·26 claims
- 0373US8413099B2Performing scenario reductionMOTTAEZ AMIR H·Filed 2010·Granted Apr 2, 2013·6 cites·18 claims
- 0467US8707241B2Performing scenario reduction using a dominance relation on a set of cornersMOTTAEZ AMIR H·Filed 2010·Granted Apr 22, 2014·2 cites·27 claims
- 0560US9047426B2Performing scenario reduction in a circuit design flowMOTTAEZ AMIR H·Filed 2010·Granted Jun 2, 2015·1 cites·16 claims
- 0644US8843871B2Estimating optimal gate sizes by using numerical delay modelsMOTTAEZ AMIR H·Filed 2012·Granted Sep 23, 2014·0 cites·18 claims
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