Assignee
POWERTECH TECHNOLOGY INC
TW·189 granted patents·131 pending applications·928 citations·filing 2006–2025
Top patents by PatentIndex Score
320 records- 0199US7569935B1Pillar-to-pillar flip-chip assemblyPOWERTECH TECHNOLOGY INC·Filed 2008·Granted Aug 4, 2009·163 cites·16 claims
- 0298US10157828B2Chip package structure with conductive pillar and a manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Dec 18, 2018·53 cites·14 claims
- 0397US9716080B1Thin fan-out multi-chip stacked package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2016·Granted Jul 25, 2017·37 cites·20 claims
- 0496US11127699B2Chip package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2020·Granted Sep 21, 2021·4 cites·18 claims
- 0595US11569210B2Package structure having a first connection circuit and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2021·Granted Jan 31, 2023·4 cites·19 claims
- 0694US7776649B1Method for fabricating wafer level chip scale packagesPOWERTECH TECHNOLOGY INC·Filed 2009·Granted Aug 17, 2010·36 cites·12 claims
- 0794US7633143B1Semiconductor package having plural chips side by side arranged on a leadframePOWERTECH TECHNOLOGY INC·Filed 2008·Granted Dec 15, 2009·30 cites·14 claims
- 0893US10128211B2Thin fan-out multi-chip stacked package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Nov 13, 2018·14 cites·22 claims
- 0992US10515936B1Package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2018·Granted Dec 24, 2019·10 cites·8 claims
- 1092US9761568B2Thin fan-out multi-chip stacked packages and the method for manufacturing the samePOWERTECH TECHNOLOGY INC·Filed 2016·Granted Sep 12, 2017·12 cites·19 claims
- 1192US9099364B1MPS-C2 semiconductor device having shorter supporting postsPOWERTECH TECHNOLOGY INC·Filed 2014·Granted Aug 4, 2015·18 cites·11 claims
- 1292US7902666B1Flip chip device having soldered metal posts by surface mountingPOWERTECH TECHNOLOGY INC·Filed 2009·Granted Mar 8, 2011·52 cites·20 claims
- 1392US7838967B2Semiconductor chip having TSV (through silicon via) and stacked assembly including the chipsPOWERTECH TECHNOLOGY INC·Filed 2008·Granted Nov 23, 2010·33 cites·21 claims
- 1491US11367641B2Wafer storage device, carrier plate and wafer cassettePOWERTECH TECHNOLOGY INC·Filed 2020·Granted Jun 21, 2022·6 cites·20 claims
- 1591US9853015B1Semiconductor device with stacking chipsPOWERTECH TECHNOLOGY INC·Filed 2016·Granted Dec 26, 2017·8 cites·11 claims
- 1691US9842811B1Heat-dissipating semiconductor package for lessening package warpagePOWERTECH TECHNOLOGY INC·Filed 2016·Granted Dec 12, 2017·15 cites·20 claims
- 1791US8368192B1Multi-chip memory package with a small substratePOWERTECH TECHNOLOGY INC·Filed 2011·Granted Feb 5, 2013·14 cites·13 claims
- 1890US10593629B2Semiconductor package with a conductive casing for heat dissipation and electromagnetic interference (EMI) shield and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2018·Granted Mar 17, 2020·9 cites·20 claims
- 1990US7619305B2Semiconductor package-on-package (POP) device avoiding crack at solder joints of micro contacts during package stackingPOWERTECH TECHNOLOGY INC·Filed 2007·Granted Nov 17, 2009·31 cites·24 claims
- 2089US11309283B2Packaging structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2020·Granted Apr 19, 2022·2 cites·14 claims
- 2189US10079218B1Test method for a redistribution layerPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Sep 18, 2018·7 cites·20 claims
- 2288US9831219B2Manufacturing method of package structurePOWERTECH TECHNOLOGY INC·Filed 2017·Granted Nov 28, 2017·6 cites·20 claims
- 2388US9412703B1Chip package structure having a shielded molding compoundPOWERTECH TECHNOLOGY INC·Filed 2015·Granted Aug 9, 2016·8 cites·6 claims
- 2487US10276545B1Semiconductor package and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2018·Granted Apr 30, 2019·19 cites·20 claims
- 2587US10224254B2Package process method including disposing a die within a recess of a one-piece materialPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Mar 5, 2019·6 cites·20 claims
- 2687US9825005B2Semiconductor package with Pillar-Top-Interconnection (PTI) configuration and its MIS fabricating methodPOWERTECH TECHNOLOGY INC·Filed 2015·Granted Nov 21, 2017·7 cites·6 claims
- 2787US9627228B1Method for manufacturing a chip package having a coating layerPOWERTECH TECHNOLOGY INC·Filed 2016·Granted Apr 18, 2017·11 cites·20 claims
- 2887US9379043B1TSV structure having insulating layers with embedded voidsPOWERTECH TECHNOLOGY INC·Filed 2015·Granted Jun 28, 2016·11 cites·10 claims
- 2986US10593647B2Package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2018·Granted Mar 17, 2020·4 cites·9 claims
- 3085US11309296B2Semiconductor package and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2019·Granted Apr 19, 2022·4 cites·13 claims
- 3185US7564123B1Semiconductor package with fastened leadsPOWERTECH TECHNOLOGY INC·Filed 2008·Granted Jul 21, 2009·16 cites·20 claims
- 3284US10141276B2Semiconductor package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Nov 27, 2018·3 cites·9 claims
- 3384US9887148B1Fan-out semiconductor package structure and fabricating methodPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Feb 6, 2018·11 cites·20 claims
- 3483US10796931B2Manufacturing method of package structurePOWERTECH TECHNOLOGY INC·Filed 2019·Granted Oct 6, 2020·3 cites·15 claims
- 3583US10276510B2Manufacturing method of package structure having conductive shieldPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Apr 30, 2019·4 cites·20 claims
- 3683US9899307B2Fan-out chip package with dummy pattern and its fabricating methodPOWERTECH TECHNOLOGY INC·Filed 2016·Granted Feb 20, 2018·4 cites·7 claims
- 3782US10950593B2Package structure including at least one connecting module and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2018·Granted Mar 16, 2021·3 cites·13 claims
- 3882US10388535B1Wafer processing method with full edge trimmingPOWERTECH TECHNOLOGY INC·Filed 2018·Granted Aug 20, 2019·7 cites·10 claims
- 3982US9899287B2Fan-out wafer level package structurePOWERTECH TECHNOLOGY INC·Filed 2017·Granted Feb 20, 2018·5 cites·18 claims
- 4082US9419033B2Chip scale package of image sensor having dam combinationPOWERTECH TECHNOLOGY INC·Filed 2014·Granted Aug 16, 2016·9 cites·8 claims
- 4182US7884472B2Semiconductor package having substrate ID code and its fabricating methodPOWERTECH TECHNOLOGY INC·Filed 2008·Granted Feb 8, 2011·13 cites·6 claims
- 4282US7667306B1Leadframe-based semiconductor packagePOWERTECH TECHNOLOGY INC·Filed 2008·Granted Feb 23, 2010·10 cites·14 claims
- 4381US9825010B2Stacked chip package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Nov 21, 2017·4 cites·18 claims
- 4481US9659911B1Package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2016·Granted May 23, 2017·3 cites·20 claims
- 4580US10978408B2Semiconductor package and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2018·Granted Apr 13, 2021·3 cites·13 claims
- 4680US10269671B2Package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Apr 23, 2019·3 cites·20 claims
- 4779US10304716B1Package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2017·Granted May 28, 2019·4 cites·19 claims
- 4879US7408245B2IC package encapsulating a chip under asymmetric single-side leadsPOWERTECH TECHNOLOGY INC·Filed 2006·Granted Aug 5, 2008·14 cites·12 claims
- 4978US11088100B2Semiconductor package and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2019·Granted Aug 10, 2021·2 cites·20 claims
- 5078US10332844B2Manufacturing method of package structurePOWERTECH TECHNOLOGY INC·Filed 2017·Granted Jun 25, 2019·2 cites·10 claims
Showing the top 50 of 320 patent records by PatentIndex Score.
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