Assignee
PROMOS TECHNOLOGIES
TW·5 granted patents·2 pending applications·45 citations·filing 2000–2003
Top patents by PatentIndex Score
7 records- 0175US7241538B2Method for providing representative features for use in inspection of photolithography mask and for use in inspection photo-lithographically developed and/or patterned wafer layers, and products of samePROMOS TECHNOLOGIES·Filed 2003·Granted Jul 10, 2007·16 cites·12 claims
- 0258US6633793B2Method to reduce lot-to-lot variation of array threshold voltage in a DRAM devicePROMOS TECHNOLOGIES·Filed 2001·Granted Oct 14, 2003·11 cites·20 claims
- 0358US6630397B1Method to improve surface uniformity of a layer of arc used for the creation of contact plugsPROMOS TECHNOLOGIES·Filed 2002·Granted Oct 7, 2003·10 cites·26 claims
- 0446US6578177B2Method to improve isolation layer fill in a DRAM array areaPROMOS TECHNOLOGIES·Filed 2001·Granted Jun 10, 2003·4 cites·20 claims
- 0544US6323137B1Method for forming an arsenic doped dielectric layerPROMOS TECHNOLOGIES·Filed 2000·Granted Nov 27, 2001·4 cites·20 claims
- 0633US2002177284A1Method of using sacrificial spacers to reduce short channel effectPROMOS TECHNOLOGIES·Filed 2002·Application pending·0 cites
- 0732US2003234659A1Electrical isolation between pins sharing the same tester channelPROMOS TECHNOLOGIES·Filed 2002·Application pending·0 cites
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