Assignee
RAORANE DIGVIJAY A
US·2 granted patents·14 citations·filing 2013–2013
Top patents by PatentIndex Score
2 records- 0191US9000599B2Multichip integration with through silicon via (TSV) die embedded in packageRAORANE DIGVIJAY A·Filed 2013·Granted Apr 7, 2015·14 cites·13 claims
- 0244US9041207B2Method to increase I/O density and reduce layer counts in BBUL packagesRAORANE DIGVIJAY A·Filed 2013·Granted May 26, 2015·0 cites·14 claims
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