Assignee
SRIDHAR SEETHARAMAN
US·2 granted patents·1 pending application·6 citations·filing 2007–2011
Top patents by PatentIndex Score
3 records- 0172US8574979B2Method for integrating silicon germanium and carbon doped silicon with source/drain regions in a strained CMOS process flowSRIDHAR SEETHARAMAN·Filed 2008·Granted Nov 5, 2013·6 cites·23 claims
- 0242US2009042377A1Method for forming self-aligned wells to support tight spacingSRIDHAR SEETHARAMAN·Filed 2007·Application pending·0 cites
- 0335US8470675B2Thick gate oxide for LDMOS and DEMOSSRIDHAR SEETHARAMAN·Filed 2011·Granted Jun 25, 2013·0 cites·20 claims
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