Assignee
WANG WEI-E
US·4 granted patents·58 citations·filing 2009–2016
Top patents by PatentIndex Score
4 records- 0195US9064699B2Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methodsWANG WEI-E·Filed 2014·Granted Jun 23, 2015·30 cites·20 claims
- 0290US9343303B2Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devicesWANG WEI-E·Filed 2014·Granted May 17, 2016·11 cites·19 claims
- 0385US8524562B2Method for reducing Fermi-Level-Pinning in a non-silicon channel MOS deviceWANG WEI-E·Filed 2009·Granted Sep 3, 2013·11 cites·20 claims
- 0483US9773906B2Relaxed semiconductor layers with reduced defects and methods of forming the sameWANG WEI-E·Filed 2016·Granted Sep 26, 2017·6 cites·20 claims
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