Assignee
YANG CHIN CHENG
TW·13 granted patents·40 citations·filing 2007–2012
Top patents by PatentIndex Score
13 records- 0191US8835100B2Double patterning by PTD and NTD processYANG CHIN CHENG·Filed 2012·Granted Sep 16, 2014·7 cites·14 claims
- 0284US8530147B2Patterning processYANG CHIN-CHENG·Filed 2007·Granted Sep 10, 2013·7 cites·20 claims
- 0384US8183123B2Method of forming mark in IC-fabricating processYANG CHIN-CHENG·Filed 2011·Granted May 22, 2012·5 cites·11 claims
- 0484US8084872B2Overlay mark, method of checking local aligmnent using the same and method of controlling overlay based on the sameYANG CHIN-CHENG·Filed 2008·Granted Dec 27, 2011·7 cites·19 claims
- 0582US9082802B2Wafer centering hardware design and processYANG CHIN CHENG·Filed 2011·Granted Jul 14, 2015·5 cites·25 claims
- 0677US8278770B2Overlay markYANG CHIN-CHENG·Filed 2007·Granted Oct 2, 2012·7 cites·9 claims
- 0769US8999838B2Semiconductor devices and methods of manufacturing the sameYANG CHIN-CHENG·Filed 2011·Granted Apr 7, 2015·2 cites·15 claims
- 0854US8835103B2Lithography process and structuresYANG CHIN CHENG·Filed 2012·Granted Sep 16, 2014·0 cites·28 claims
- 0950US8804096B2Apparatus for and method of wafer edge exposureYANG CHIN CHENG·Filed 2011·Granted Aug 12, 2014·0 cites·22 claims
- 1049US8847122B2Method and apparatus for transferring substrateYANG CHIN-CHENG·Filed 2009·Granted Sep 30, 2014·0 cites·8 claims
- 1149US8076758B2Wafer structureYANG CHIN-CHENG·Filed 2010·Granted Dec 13, 2011·0 cites·8 claims
- 1247US9188883B2Alignment markYANG CHIN-CHENG·Filed 2007·Granted Nov 17, 2015·0 cites·7 claims
- 1338US8232203B2Methods of manufacturing memory devicesYANG CHIN CHENG·Filed 2010·Granted Jul 31, 2012·0 cites·14 claims
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