Assignee
YEDIDIA JONATHAN S
US·2 granted patents·3 pending applications·19 citations·filing 2004–2009
Top patents by PatentIndex Score
5 records- 0182US8261170B2Multi-stage decoder for error-correcting codesYEDIDIA JONATHAN S·Filed 2009·Granted Sep 4, 2012·15 cites·13 claims
- 0271US8407550B2Method and system for decoding graph-based codes using message-passing with difference-map dynamicsYEDIDIA JONATHAN S·Filed 2009·Granted Mar 26, 2013·4 cites·16 claims
- 0340US2008270330A1Multi-Cellular Logic CircuitsYEDIDIA JONATHAN S·Filed 2007·Application pending·0 cites
- 0431US2008052594A1Method and system for replica group-shuffled iterative decoding of quasi-cyclic low-density parity check codesYEDIDIA JONATHAN S·Filed 2006·Application pending·0 cites
- 0529US2006048038A1Compressing signals using serially-concatenated accumulate codesYEDIDIA JONATHAN S·Filed 2004·Application pending·0 cites
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