Assignee
YU CHEN-HUA
TW·87 granted patents·11 pending applications·3,135 citations·filing 2006–2013
Top patents by PatentIndex Score
98 records- 0199US9111949B2Methods and apparatus of wafer level package for heterogeneous integration technologyYU CHEN-HUA·Filed 2012·Granted Aug 18, 2015·1k cites·20 claims
- 0299US8829676B2Interconnect structure for wafer level packageYU CHEN-HUA·Filed 2011·Granted Sep 9, 2014·610 cites·20 claims
- 0399US8722286B2Devices and methods for improved reflective electron beam lithographyYU CHEN-HUA·Filed 2012·Granted May 13, 2014·82 cites·20 claims
- 0499US8680647B2Packages with passive devices and methods of forming the sameYU CHEN-HUA·Filed 2012·Granted Mar 25, 2014·594 cites·20 claims
- 0599US8531032B2Thermally enhanced structure for multi-chip deviceYU CHEN-HUA·Filed 2011·Granted Sep 10, 2013·72 cites·7 claims
- 0698US8912651B2Package-on-package (PoP) structure including stud bulbs and methodYU CHEN-HUA·Filed 2012·Granted Dec 16, 2014·41 cites·16 claims
- 0798US8411459B2Interposer-on-glass package structuresYU CHEN-HUA·Filed 2010·Granted Apr 2, 2013·51 cites·13 claims
- 0897US9171790B2Package on package devices and methods of packaging semiconductor diesYU CHEN-HUA·Filed 2012·Granted Oct 27, 2015·40 cites·19 claims
- 0997US9082763B2Joint structure for substrates and methods of formingYU CHEN-HUA·Filed 2012·Granted Jul 14, 2015·37 cites·22 claims
- 1097US8900994B2Method for producing a protective structureYU CHEN-HUA·Filed 2011·Granted Dec 2, 2014·25 cites·20 claims
- 1197US8674513B2Interconnect structures for substrateYU CHEN-HUA·Filed 2010·Granted Mar 18, 2014·36 cites·17 claims
- 1297US8642393B1Package on package devices and methods of forming sameYU CHEN-HUA·Filed 2012·Granted Feb 4, 2014·48 cites·19 claims
- 1397US8629465B2Light-emitting diodes on concave texture substrateYU CHEN-HUA·Filed 2012·Granted Jan 14, 2014·16 cites·19 claims
- 1496US8698306B2Substrate contact openingYU CHEN-HUA·Filed 2010·Granted Apr 15, 2014·23 cites·20 claims
- 1596US8338945B2Molded chip interposer structure and methodsYU CHEN-HUA·Filed 2010·Granted Dec 25, 2012·25 cites·17 claims
- 1695US9105552B2Package on package devices and methods of packaging semiconductor diesYU CHEN-HUA·Filed 2012·Granted Aug 11, 2015·33 cites·20 claims
- 1795US8810006B2Interposer system and methodYU CHEN-HUA·Filed 2012·Granted Aug 19, 2014·20 cites·20 claims
- 1895US8664760B2Connector design for packaging integrated circuitsYU CHEN-HUA·Filed 2012·Granted Mar 4, 2014·18 cites·11 claims
- 1995US8101994B2Semiconductor device having multiple fin heightsYU CHEN-HUA·Filed 2010·Granted Jan 24, 2012·19 cites·20 claims
- 2095US8058082B2Light-emitting diode with textured substrateYU CHEN-HUA·Filed 2008·Granted Nov 15, 2011·28 cites·19 claims
- 2194US8779588B2Bump structures for multi-chip packagingYU CHEN-HUA·Filed 2012·Granted Jul 15, 2014·13 cites·20 claims
- 2294US8440564B2Schemes for forming barrier layers for copper in interconnect structuresYU CHEN-HUA·Filed 2012·Granted May 14, 2013·9 cites·20 claims
- 2392US9123763B2Package-on-package (PoP) structure having at least one package comprising one die being disposed in a core material between first and second surfaces of the core materialYU CHEN-HUA·Filed 2011·Granted Sep 1, 2015·13 cites·13 claims
- 2491US9219030B2Package on package structures and methods for forming the sameYU CHEN-HUA·Filed 2012·Granted Dec 22, 2015·9 cites·16 claims
- 2591US8134163B2Light-emitting diodes on concave texture substrateYU CHEN-HUA·Filed 2008·Granted Mar 13, 2012·14 cites·14 claims
- 2690US8617948B2Reducing resistance in source and drain regions of FinFETsYU CHEN-HUA·Filed 2011·Granted Dec 31, 2013·8 cites·15 claims
- 2790US8487410B2Through-silicon vias for semicondcutor substrate and method of manufactureYU CHEN-HUA·Filed 2011·Granted Jul 16, 2013·8 cites·9 claims
- 2889US9111896B2Package-on-package semiconductor deviceYU CHEN-HUA·Filed 2013·Granted Aug 18, 2015·6 cites·20 claims
- 2989US8999179B2Conductive vias in a substrateYU CHEN-HUA·Filed 2011·Granted Apr 7, 2015·10 cites·20 claims
- 3089US8946742B2Semiconductor package with through silicon viasYU CHEN-HUA·Filed 2010·Granted Feb 3, 2015·7 cites·20 claims
- 3189US8232201B2Schemes for forming barrier layers for copper in interconnect structuresYU CHEN-HUA·Filed 2011·Granted Jul 31, 2012·5 cites·20 claims
- 3289US8134169B2Patterned substrate for hetero-epitaxial growth of group-III nitride filmYU CHEN-HUA·Filed 2008·Granted Mar 13, 2012·12 cites·17 claims
- 3388US8659033B2Light-emitting diode with textured substrateYU CHEN-HUA·Filed 2011·Granted Feb 25, 2014·4 cites·15 claims
- 3488US8432040B2Interconnection structure design for low RC delay and leakageYU CHEN-HUA·Filed 2006·Granted Apr 30, 2013·17 cites·8 claims
- 3586US9691706B2Multi-chip fan out package and methods of forming the sameYU CHEN-HUA·Filed 2012·Granted Jun 27, 2017·6 cites·18 claims
- 3686US8703539B2Multiple die packaging interposer structure and methodYU CHEN-HUA·Filed 2012·Granted Apr 22, 2014·7 cites·15 claims
- 3785US8803323B2Package structures and methods for forming the sameYU CHEN-HUA·Filed 2012·Granted Aug 12, 2014·7 cites·13 claims
- 3885US8759949B2Wafer backside structures having copper pillarsYU CHEN-HUA·Filed 2010·Granted Jun 24, 2014·8 cites·11 claims
- 3985US8652260B2Apparatus for holding semiconductor wafersYU CHEN-HUA·Filed 2008·Granted Feb 18, 2014·8 cites·13 claims
- 4084US8446012B2Interconnect structuresYU CHEN-HUA·Filed 2007·Granted May 21, 2013·10 cites·15 claims
- 4184US8405225B2Three-dimensional integrated circuits with protection layersYU CHEN-HUA·Filed 2012·Granted Mar 26, 2013·9 cites·20 claims
- 4282US8525343B2Device with through-silicon via (TSV) and method of forming the sameYU CHEN-HUA·Filed 2010·Granted Sep 3, 2013·5 cites·21 claims
- 4382US8143162B2Interconnect structure having a silicide/germanide cap layerYU CHEN-HUA·Filed 2009·Granted Mar 27, 2012·9 cites·20 claims
- 4481US8749043B2Package on package structureYU CHEN-HUA·Filed 2012·Granted Jun 10, 2014·4 cites·20 claims
- 4580US9515036B2Methods and apparatus for solder connectionsYU CHEN-HUA·Filed 2012·Granted Dec 6, 2016·4 cites·19 claims
- 4680US9001308B2Pattern generator for a lithography systemYU CHEN-HUA·Filed 2013·Granted Apr 7, 2015·3 cites·20 claims
- 4780US8664040B2Exposing connectors in packages through selective treatmentYU CHEN-HUA·Filed 2011·Granted Mar 4, 2014·4 cites·14 claims
- 4880US8143114B2System and method for source/drain contact processingYU CHEN-HUA·Filed 2011·Granted Mar 27, 2012·4 cites·20 claims
- 4979US9324756B2CIS chips and methods for forming the sameYU CHEN-HUA·Filed 2012·Granted Apr 26, 2016·4 cites·19 claims
- 5078US9010617B2Solder joint reflow process for reducing packaging failure rateYU CHEN-HUA·Filed 2011·Granted Apr 21, 2015·5 cites·9 claims
Showing the top 50 of 98 patent records by PatentIndex Score.
Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →