Inventor
YABLOK IRWIN
US10 patents
⚠️ This page may combine multiple inventors who share the name “YABLOK IRWIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
9 patentsUS7491988B2Feb 17, 2009
Transistors with increased mobility in the channel zone and method of fabrication
INTEL CORP139 citations97
US6908027B2Jun 21, 2005
Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening process
INTEL CORP224 citations97
US7161224B2Jan 9, 2007
Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening process
INTEL CORP12 citations82
US7091108B2Aug 15, 2006
Methods and apparatuses for manufacturing ultra thin device layers for integrated circuit devices
INTEL CORP9 citations71
US7473614B2Jan 6, 2009
Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer
INTEL CORP6 citations62
US6924543B2Aug 2, 2005
Method for making a semiconductor device having increased carrier mobility
INTEL CORP6 citations62
US6911380B2Jun 28, 2005
Method of forming silicon on insulator wafers
INTEL CORP5 citations62
US7531429B2May 12, 2009
Methods and apparatuses for manufacturing ultra thin device layers for integrated circuit devices
INTEL CORP2 citations60
US7378331B2May 27, 2008
Methods of vertically stacking wafers using porous silicon
INTEL CORP5 citations57