Inventor

YEH YU-LUNG

TW57 patents

⚠️ This page may combine multiple inventors who share the name “YEH YU-LUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YEH YU-LUNG

TAIWAN SEMICONDUCTOR MFG CO LTD

CMOS image sensor with dual damascene grid design having absorption enhancement structure

QE approach by double-side, multi absorption structure

Method for forming CMOS image sensor structure

CMOS image sensor structure

Image sensor with a high absorption layer

Image sensor device with reflective structure and method for forming the same

CMOS image sensor structure

CMOS image sensor structure with microstructures on backside surface of semiconductor layer

CMOS image sensor structure with microstructures formed on semiconductor layer

CMOS image sensor with dual damascene grid design having absorption enhancement structure

CMOS image sensor structure with crosstalk improvement

CMOS image sensor structure with crosstalk improvement

QE approach by double-side, multi absorption structure

QE approach by double-side, multi absorption structure

Image sensor with a high absorption layer

Front side illuminated image sensor device structure and method for forming the same

Semiconductor structure and manufacturing method thereof

Substrate fabrication method to improve RF (radio frequency) device performance

Mechanisms for forming metal-insulator-metal (MIM) capacitor structure

Passivation layer for a semiconductor device and method for manufacturing the same

Image sensor device with reflective structure

Image sensor with a high absorption layer

Image sensor device with reflective layer

Integrated fabrication of semiconductor devices

Deep trench isolation structures resistant to cracking

Semiconductor device including deep trench isolation structure comprising dielectric structure and copper structure and method of making the same

Fabrication method of metal-free SOI wafer

Deep trench isolation structures resistant to cracking

Fabrication method of metal-free SOI wafer

Semiconductor structure and manufacturing method thereof

Surface damage control in diodes

Semiconductor arrangement comprising isolation structure comprising at least two electrical insulator layers

Surface damage control in diodes

Semiconductor arrangement including a first electrical insulator layer and a second electrical insulator layer and method of making

Plating membrane

Plating membrane

Semiconductor structure and formation thereof

Passivation layer for a semiconductor device and method for manufacturing the same

Method and system for forming metal-insulator-metal capacitors

Method and system for forming metal-insulator-metal capacitors

Method for forming image-sensor device

Image sensor device with improved quantum efficiency

Image-sensor device and method of manufacturing the same

Method for forming image sensor device

QE approach by double-side, multi absorption structure

Image sensor with a high absorption layer

TAIWAN SEMICONDUCTOR MFG

Microelectronic device with a redistribution layer having a step shaped portion and method of making the same

Semiconductor device and manufacturing method thereof

Forming metal-insulator-metal capacitors over a top metal layer

WU KUN-MAO

Forming metal-insulator-metal capacitors over a top metal layer