Inventor

COOK JEFFREY J

US18 patents

⚠️ This page may combine multiple inventors who share the name “COOK JEFFREY J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

COOK JEFFREY J

INTEL CORP

Systems, methods, and apparatuses for heterogeneous computing

Systems, methods, and apparatuses for heterogeneous computing

Systems, methods, and apparatuses for heterogeneous computing

Using control flow data structures to direct and track instruction execution

Technologies for translation cache management in binary translation systems

Systems, methods, and apparatuses for heterogeneous computing

Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads

Accelerated interlane vector reduction instructions

Gather-scatter cache architecture having plurality of tag and data banks and arbiter for single program multiple data (SPMD) processor

Technologies for translation cache management in binary translation systems

System, apparatus and method for symbolic store address generation for data-parallel processor

Hardware for miss handling from a translation protection data structure

Accelerated interlane vector reduction instructions

Analyzing potential benefits of vectorization

Implementation of processor trace in a processor that supports binary translation

COOK JEFFREY J

Combination can opening tool

Electrical outlet cover system

SASANKA RUCHIRA

Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads