Inventor

MOERTL DANIEL F

US79 patents

⚠️ This page may combine multiple inventors who share the name “MOERTL DANIEL F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MOERTL DANIEL F

IBM

Splitting endpoint address translation cache management responsibilities between a device driver and device driver services

Communicating with an I/O device using a queue data structure and pre-translated addresses

Communicating with a memory registration enabled adapter using cached address translations

Data compression method and structure for a direct access storage device

Distributed directory method and structure for direct access storage device (DASD) data compression

Apparatus and method for burst data transfer employing a pause at fixed data intervals

Apparatus and method for writing data from a cache to a storage device

Implementing hardware accelerator for storage write cache management for managing cache destage rates and thresholds for storage write cache

Raid system performance enhancement using compressed data and byte addressable storage devices

Reducing latency for raid destage operations

Implementing extent granularity authorization initialization processing in CAPI adapters

Parity stripe lock engine

Implementing extent granularity authorization processing in CAPI adapters

Storage controller and methods for using the same

Raid system performance enhancement using compressed data

Implementing hardware accelerator for storage write cache management for writes to storage write cache

Implementing hardware accelerator for storage write cache management for reads from storage write cache

Implementing hardware accelerator for storage write cache management for managing cache line updates for writes, reads, and destages in storage write cache

Implementing hardware accelerator for storage write cache management for identification of data age in storage write cache

Implementing hardware accelerator for storage write cache management with cache line manipulation

Implementing hardware accelerator for storage write cache management for managing cache line updates for purges from storage write cache

Implementing hardware accelerator for storage write cache management for reads with partial read hits from storage write cache

Implementing hardware accelerator for storage write cache management for merging data with existing data on fast writes to storage write cache

Implementing hardware accelerator for storage write cache management for simultaneous read and destage operations from storage write cache

Implementing hardware accelerator for storage write cache management for destage operations from storage write cache

Operating a RAID array with unequal stripes

Caching data in a redundant array of independent disks (RAID) storage system

Data transfer with implicit notification

Persistent logical to virtual table

Dynamic tier remapping of data stored in a hybrid storage system

Caching data in a redundant array of independent disks (RAID) storage system

Implementing block device extent granularity authorization model processing in CAPI adapters

Implementing hardware accelerator for storage write cache management for managing cache destage rates and thresholds for storage write cache

Dynamic tier remapping of data stored in a hybrid storage system

Implementing extent granularity authorization processing in CAPI adapters

Implementing block device extent granularity authorization model processing in CAPI adapters

Implementing extent granularity authorization and deauthorization processing in CAPI adapters

Implementing extent granularity authorization command flow processing in CAPI adapters

Implementing extent granularity authorization processing in CAPI adapters

BAKKE BRIAN E

Implementing storage adapter performance optimization with chained hardware operations minimizing hardware/firmware interactions

Implementing enhanced IO data conversion with protection information model including parity format of data integrity fields

Implementing storage adapter performance optimization with parity update footprint mirroring

Implementing storage adapter performance optimization with cache data/directory mirroring

Implementing storage adapter performance optimization with hardware accelerators offloading firmware for buffer allocation and automatically DMA

Implementing storage adapter performance optimization with chained hardware operations and error recovery firmware path

Implementing storage adapter performance optimization with enhanced hardware and software interface

GALBRAITH ROBERT E

Managing possibly logically bad blocks in storage devices

Managing logically bad blocks in storage devices

MOERTL DANIEL F

Method for communicating with a network adapter using a queue data structure and cached address translations

GERHARD ADRIAN C

Implementing storage adapter performance optimization with hardware operations completion coalescence