Inventor

GALBRAITH ROBERT E

US32 patents

⚠️ This page may combine multiple inventors who share the name “GALBRAITH ROBERT E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GALBRAITH ROBERT E

IBM

Pass-through for I/O channel subsystem call instructions for accessing shared resources in a computer system having a plurality of operating systems

Method and means for sharing I/O resources by a plurality of operating systems

Parity block configuration in an array of storage devices

Establishing and restoring paths in a data processing I/O system

Channel measurement method and means

Implementing hardware accelerator for storage write cache management for managing cache destage rates and thresholds for storage write cache

Implementing hardware accelerator for storage write cache management for managing cache line updates for writes, reads, and destages in storage write cache

Implementing hardware accelerator for storage write cache management for identification of data age in storage write cache

Implementing hardware accelerator for storage write cache management with cache line manipulation

Implementing hardware accelerator for storage write cache management for managing cache line updates for purges from storage write cache

Implementing hardware accelerator for storage write cache management for reads with partial read hits from storage write cache

Implementing hardware accelerator for storage write cache management for reads from storage write cache

Implementing hardware accelerator for storage write cache management for writes to storage write cache

Implementing hardware accelerator for storage write cache management for simultaneous read and destage operations from storage write cache

Implementing hardware accelerator for storage write cache management for destage operations from storage write cache

Implementing hardware accelerator for storage write cache management for merging data with existing data on fast writes to storage write cache

Implementing storage adapter performance control

Corrupt logical block addressing recovery scheme

Persistent logical to virtual table

Implementing hardware accelerator for storage write cache management for managing cache destage rates and thresholds for storage write cache

Implementing hardware accelerator for storage write cache management

Thread checkpoint table for computer processor

Implementing dynamic banding of self encrypting drive

BAKKE BRIAN E

Implementing enhanced IO data conversion with protection information model including parity format of data integrity fields

Implementing storage adapter performance optimization with parity update footprint mirroring

Implementing storage adapter performance optimization with hardware chains to select performance path

GALBRAITH ROBERT E

Managing possibly logically bad blocks in storage devices

Managing logically bad blocks in storage devices

Writing new data of a first block size to a second block size using a write-write mode

GLOBALFOUNDRIES INC

Implementing enhanced data caching and takeover of non-owned storage devices in dual storage device controller configuration with data in write cache

WORLD COMPUTER CORP

Keyboard-printer terminal interface for data processing

BOWLES BRIAN L

Implementing device physical location identification in serial attached SCSI (SAS) fabric using resource path groups