Inventor
BHATIA HARSARAN S
30 patents
Patents
30 patentsUS4252582AFeb 24, 1981
Self aligned method for making bipolar transistor having minimum base to emitter contact spacing
IBM58 citations96
US5243140ASep 7, 1993
Direct distribution repair and engineering change system
IBM33 citations92
US4691435ASep 8, 1987
Method for making Schottky diode having limited area self-aligned guard ring
IBM35 citations92
US4427989AJan 24, 1984
High density memory cell
IBM29 citations92
US4389281AJun 21, 1983
Method of planarizing silicon dioxide in semiconductor devices
IBM32 citations92
US4236294ADec 2, 1980
High performance bipolar device and method for making same
IBM31 citations92
US4160991AJul 10, 1979
High performance bipolar device and method for making same
IBM45 citations92
US6806793B2Oct 19, 2004
MLC frequency selective circuit structures
IBM25 citations91
US6528735B1Mar 4, 2003
Substrate design of a chip using a generic substrate design
IBM41 citations90
US5427983AJun 27, 1995
Process for corrosion free multi-layer metal conductors
IBM21 citations90
US6975199B2Dec 13, 2005
Embedded inductor and method of making
IBM29 citations89
US4507171AMar 26, 1985
Method for contacting a narrow width PN junction region
IBM29 citations89
US4264382AApr 28, 1981
Method for making a lateral PNP or NPN with a high gain utilizing reactive ion etching of buried high conductivity regions
IBM51 citations89
US4214315AJul 22, 1980
Method for fabricating vertical NPN and PNP structures and the resulting product
IBM25 citations82
US4159915AJul 3, 1979
Method for fabrication vertical NPN and PNP structures utilizing ion-implantation
IBM28 citations82
US4196440AApr 1, 1980
Lateral PNP or NPN with a high gain
IBM23 citations81
US4464212AAug 7, 1984
Method for making high sheet resistivity resistors
IBM11 citations74
US6573728B2Jun 3, 2003
Method and circuit for electrical testing of isolation resistance of large capacitance network
IBM7 citations73
US4796069AJan 3, 1989
Schottky diode having limited area self-aligned guard ring and method for making same
IBM10 citations73
US4535531AAug 20, 1985
Method and resulting structure for selective multiple base width transistor structures
IBM19 citations73
US4389294AJun 21, 1983
Method for avoiding residue on a vertical walled mesa
IBM17 citations73
US4746815AMay 24, 1988
Electronic EC for minimizing EC pads
IBM8 citations72
US6931712B2Aug 23, 2005
Method of forming a dielectric substrate having a multiturn inductor
IBM10 citations71
US4712125ADec 8, 1987
Structure for contacting a narrow width PN junction region
IBM18 citations70
US7701874B2Apr 20, 2010
Intelligent sensor network
IBM4 citations63
US4426655AJan 17, 1984
Memory cell resistor device
IBM4 citations61
US7704802B2Apr 27, 2010
Programmable random logic arrays using PN isolation
IBM0 citations51
US7420248B2Sep 2, 2008
Programmable random logic arrays using PN isolation
IBM0 citations51
US4743781AMay 10, 1988
Dotting circuit with inhibit function
IBM1 citations51
US7325213B2Jan 29, 2008
Nested design approach
IBM0 citations48