Inventor
HEDBERG ERIK LEIGH
US16 patents
Patents
16 patentsUS5807791ASep 15, 1998
Methods for fabricating multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes
IBM158 citations99
US5731945AMar 24, 1998
Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes
IBM126 citations99
US5502333AMar 26, 1996
Semiconductor stack structures and fabrication/sparing methods utilizing programmable spare circuit
IBM389 citations99
US6141245AOct 31, 2000
Impedance control using fuses
IBM142 citations98
US5946545AAug 31, 1999
Semiconductor stack structures and fabrication/sparing methods utilizing programmable spare circuit
IBM98 citations98
US5943254AAug 24, 1999
Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes
IBM171 citations98
US5702984ADec 30, 1997
Integrated mulitchip memory module, structure and fabrication
IBM163 citations98
US5859804AJan 12, 1999
Method and apparatus for real time two dimensional redundancy allocation
IBM119 citations97
US6219215B1Apr 17, 2001
Chip thermal protection device
IBM65 citations96
US6239649B1May 29, 2001
Switched body SOI (silicon on insulator) circuits and fabrication method therefor
IBM78 citations95
US6026505AFeb 15, 2000
Method and apparatus for real time two dimensional redundancy allocation
IBM55 citations95
US5703823ADec 30, 1997
Memory device with programmable self-refreshing and testing methods therefore
IBM74 citations94
US6243283B1Jun 5, 2001
Impedance control using fuses
IBM42 citations92
US5798282AAug 25, 1998
Semiconductor stack structures and fabrication sparing methods utilizing programmable spare circuit
IBM22 citations92
US5898623AApr 27, 1999
Input port switching protocol for a random access memory
IBM18 citations84
US6255208B1Jul 3, 2001
Selective wafer-level testing and burn-in
IBM10 citations72