P

Inventor

BISSEY LUCIEN J

US26 patents
⚠️ This page may combine multiple inventors who share the name “BISSEY LUCIEN J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MICRON TECHNOLOGY INC

24 patents
US6794699B2Sep 21, 2004

Annular gate and technique for fabricating an annular gate

MICRON TECHNOLOGY INC172 citations99
US7205598B2Apr 17, 2007

Random access memory device utilizing a vertically oriented select transistor

MICRON TECHNOLOGY INC60 citations98
US6504236B2Jan 7, 2003

Semiconductor die assembly having leadframe decoupling characters and method

MICRON TECHNOLOGY INC37 citations96
US6184574B1Feb 6, 2001

Multi-capacitance lead frame decoupling device

MICRON TECHNOLOGY INC63 citations96
US6054754AApr 25, 2000

Multi-capacitance lead frame decoupling device

MICRON TECHNOLOGY INC69 citations96
US7777264B2Aug 17, 2010

Random access memory device utilizing a vertically oriented select transistor

MICRON TECHNOLOGY INC15 citations92
US6841438B2Jan 11, 2005

Annular gate and technique for fabricating an annular gate

MICRON TECHNOLOGY INC27 citations92
US6781219B2Aug 24, 2004

Semiconductor die assembly having leadframe decoupling characters

MICRON TECHNOLOGY INC22 citations92
US6356474B1Mar 12, 2002

Efficient open-array memory device architecture and method

MICRON TECHNOLOGY INC31 citations92
US6310388B1Oct 30, 2001

Semiconductor die assembly having leadframe decoupling characters

MICRON TECHNOLOGY INC21 citations92
US6169696B1Jan 2, 2001

Method and apparatus for stress testing a semiconductor memory

MICRON TECHNOLOGY INC21 citations92
US7276754B2Oct 2, 2007

Annular gate and technique for fabricating an annular gate

MICRON TECHNOLOGY INC10 citations84
US5848017ADec 8, 1998

Method and apparatus for stress testing a semiconductor memory

MICRON TECHNOLOGY INC15 citations82
US6951789B2Oct 4, 2005

Method of fabricating a random access memory device utilizing a vertically oriented select transistor

MICRON TECHNOLOGY INC11 citations74
US5999467ADec 7, 1999

Method and apparatus for stress testing a semiconductor memory

MICRON TECHNOLOGY INC10 citations74
US6784043B2Aug 31, 2004

Methods for forming aligned fuses disposed in an integrated circuit

MICRON TECHNOLOGY INC7 citations71
US6522595B2Feb 18, 2003

Methods for forming and programming aligned fuses disposed in an integrated circuit

MICRON TECHNOLOGY INC5 citations71
US6172929B1Jan 9, 2001

Integrated circuit having aligned fuses and methods for forming and programming the fuses

MICRON TECHNOLOGY INC14 citations71
US7432197B2Oct 7, 2008

Methods of patterning photoresist, and methods of forming semiconductor constructions

MICRON TECHNOLOGY INC4 citations63
US11822489B2Nov 21, 2023

Data integrity protection for relocating data in a memory system

MICRON TECHNOLOGY INC0 citations52
US7964503B2Jun 21, 2011

Methods of patterning photoresist, and methods of forming semiconductor constructions

MICRON TECHNOLOGY INC0 citations52
US6235622B1May 22, 2001

Method and apparatus for isolating a conductive region from a substrate during manufacture of an integrated circuit and connected to the substrate after manufacture

MICRON TECHNOLOGY INC0 citations51
US6137119AOct 24, 2000

Apparatus for isolating a conductive region from a substrate during manufacture of an integrated circuit and connecting the conductive region to the substrate after manufacture

MICRON TECHNOLOGY INC0 citations51
US6642084B2Nov 4, 2003

Methods for forming aligned fuses disposed in an integrated circuit

MICRON TECHNOLOGY INC1 citations49

VOSHELL THOMAS W

1 patent

BISSEY LUCIEN J

1 patent