Inventor

MALLIKARJUNAN VARUN

IN10 patents

⚠️ This page may combine multiple inventors who share the name “MALLIKARJUNAN VARUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

4 patents

US8930760B2Jan 6, 2015

Validating cache coherency protocol within a processor

IBM2 citations61

US8892949B2Nov 18, 2014

Effective validation of execution units within a processor

IBM2 citations61

US9158640B2Oct 13, 2015

Tightly-coupled context-aware irritator thread creation for verification of microprocessors

IBM0 citations51

US9287005B2Mar 15, 2016

Detecting missing write to cache/memory operations

IBM1 citations45

GLOBALFOUNDRIES INC

2 patents

US9298516B2Mar 29, 2016

Verification of dynamic logical partitioning

GLOBALFOUNDRIES INC3 citations72

US9286133B2Mar 15, 2016

Verification of dynamic logical partitioning

GLOBALFOUNDRIES INC3 citations72

ALAPATI SANGRAM

2 patents

US8667255B2Mar 4, 2014

Measuring runtime coverage of architectural events of a microprocessor

ALAPATI SANGRAM2 citations60

US8850266B2Sep 30, 2014

Effective validation of execution units within a processor

ALAPATI SANGRAM0 citations50

KUMAR PRATHIBA

1 patent

US8607243B2Dec 10, 2013

Dynamic operating system optimization in parallel computing

KUMAR PRATHIBA6 citations81

PRATHIBA KUMAR

1 patent

US8904403B2Dec 2, 2014

Dynamic optimization of thread assignments for application workloads in parallel computing

PRATHIBA KUMAR5 citations63