Inventor
CHEN WEI P
US11 patents
Patents
11 patentsUS12235720B2Feb 25, 2025
Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS)
INTEL CORP3 citations73
US11250902B2Feb 15, 2022
Method and apparatus to reduce power consumption for refresh of memory devices on a memory module
INTEL CORP2 citations71
US12373287B2Jul 29, 2025
Distribution of error checking and correction (ECC) bits to allocate ECC bits for metadata
INTEL CORP0 citations62
US12386748B2Aug 12, 2025
Selective fill for logical control over hardware multilevel memory
INTEL CORP1 citations58
US11580029B2Feb 14, 2023
Memory system, computing system, and methods thereof for cache invalidation with dummy address space
INTEL CORP0 citations57
US10997082B2May 4, 2021
Memory system, computing system, and methods thereof for cache invalidation with dummy address space
INTEL CORP0 citations57
US12242342B2Mar 4, 2025
Fast memory ECC error correction
INTEL CORP0 citations51
US12430057B2Sep 30, 2025
Dynamic multilevel memory system
INTEL CORP0 citations50
US11567877B2Jan 31, 2023
Memory utilized as both system memory and near memory
INTEL CORP0 citations50
US11307996B2Apr 19, 2022
Hardware unit for reverse translation in a processor
INTEL CORP0 citations50
US12271305B2Apr 8, 2025
Two-level main memory hierarchy management
INTEL CORP0 citations48