Inventor

BABAIAN BORIS A

RU19 patents

⚠️ This page may combine multiple inventors who share the name “BABAIAN BORIS A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BABAIAN BORIS A

ELBRUS INTERNAT

Method for emulating hardware features of a foreign architecture in a host operating system environment

Method for fast execution of translated binary code utilizing database cache for low-level code correspondence

Single-chip multiprocessor with cycle-precise program scheduling of parallel execution

Method and apparatus for preserving precise exceptions in binary translated code

Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution

Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architecture

Method for prioritizing operations within a pipelined microprocessor based upon required results

ELBRUS INTERNAT LTD

Integrity of tagged data

Critical path optimization-unzipping

Critical path optimization—unload hard extended scalar block

Critical path optimization-optimizing branch operation insertion

Method for removing dependent store-load pair from critical path

Branch preparation

Method and system for asynchronous array loading

ELBRUS INTERNATIONAL LTD

Architectural support for software pipelining of nested loops

Architectural support for execution control of prologue and eplogue periods of loops in a VLIW processor

ELBRUS INTERNATIONAL

Array prefetch apparatus and method

BABAIAN BORIS A

Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution

INST TOCHNOI MEK I VYCHISLITEL

Wide instruction word architecture central processor