Inventor

GRUZDOV FEODOR A

RU9 patents

⚠️ This page may combine multiple inventors who share the name “GRUZDOV FEODOR A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ELBRUS INTERNAT

3 patents

US7143401B2Nov 28, 2006

Single-chip multiprocessor with cycle-precise program scheduling of parallel execution

ELBRUS INTERNAT40 citations89

US7895587B2Feb 22, 2011

Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution

ELBRUS INTERNAT3 citations59

US7003650B2Feb 21, 2006

Method for prioritizing operations within a pipelined microprocessor based upon required results

ELBRUS INTERNAT5 citations56

ELBRUS INTERNATIONAL LTD

2 patents

US5958048ASep 28, 1999

Architectural support for software pipelining of nested loops

ELBRUS INTERNATIONAL LTD105 citations93

US5794029AAug 11, 1998

Architectural support for execution control of prologue and eplogue periods of loops in a VLIW processor

ELBRUS INTERNATIONAL LTD45 citations89

ELBRUS INTERNAT LTD

2 patents

US6549903B1Apr 15, 2003

Integrity of tagged data

ELBRUS INTERNAT LTD41 citations91

US6560775B1May 6, 2003

Branch preparation

ELBRUS INTERNAT LTD3 citations54

ELBRUS INTERNATIONAL

1 patent

US5889985AMar 30, 1999

Array prefetch apparatus and method

ELBRUS INTERNATIONAL37 citations89

BABAIAN BORIS A

1 patent

US8261250B2Sep 4, 2012

Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution

BABAIAN BORIS A5 citations65