Inventor

ELLER MANFRED

US46 patents

⚠️ This page may combine multiple inventors who share the name “ELLER MANFRED”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ELLER MANFRED

GLOBALFOUNDRIES INC

Integrated circuits with varying gate structures and fabrication methods

Integrated circuit having multiple threshold voltages

Methods to improve FinFet semiconductor device behavior using co-implantation under the channel region

Vertical SRAM structure with cross-coupling contacts penetrating through common gates to bottom S/D metal contacts

SRAM bitcell structures facilitating biasing of pass gate transistors

Integration method for fabrication of metal gate based multiple threshold voltage devices and circuits

Method of manufacturing a vertical SRAM with cross-coupled contacts penetrating through common gate structures

FINFET circuit structures with vertically spaced transistors and fabrication methods

SRAM bitcell structures facilitating biasing of pull-up transistors

SRAM bitcell structures facilitating biasing of pull-down transistors

Fabrication methods facilitating integration of different device architectures

Methods for forming FinFETs with reduced series resistance

Source/drain parasitic capacitance reduction in FinFET-based semiconductor structure having tucked fins

Fin-FET replacement metal gate structure and method of manufacturing the same

Methods of forming doped transition regions of transistor structures

Source/drain parasitic capacitance reduction in FinFET-based semiconductor structure having tucked fins

Semiconductor memory devices having an undercut source/drain region

Circuit structures with vertically spaced transistors and fabrication methods

Semiconductor memory devices having an undercut source/drain region

SOI-based semiconductor device with dynamic threshold voltage

Methods of forming multiple N-type semiconductor devices with different threshold voltages on a semiconductor substrate

Transistor device structures with retrograde wells in CMOS applications

Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structures

Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structures

Methods of forming a resistor structure between adjacent transistor gates on an integrated circuit product and the resulting devices

INFINEON TECHNOLOGIES AG

Integrated circuits and methods of design and manufacture thereof

Method of implanting a non-dopant atom into a semiconductor device

Methods of manufacturing semiconductor devices with rotated substrates

Integrated circuits and methods of design and manufacture thereof

Integrated circuits and methods of design and manufacture thereof

Semiconductor devices and methods of manufacture thereof

Integrated circuits and methods of design and manufacture thereof

Methods of forming conductive features and structures thereof

Transistor fabrication methods and structures thereof

Threshold voltage consistency and effective width in same-substrate device groups

Semiconductor devices and methods of manufacture thereof

SAMSUNG ELECTRONICS CO LTD

Test structure of semiconductor device

Semiconductor embedded resistor generation

Test structure of semiconductor device

HAFFNER HENNING

Integrated circuits and methods of design and manufacture thereof

Integrated circuits and methods of design and manufacture thereof

IBM

Semiconductor devices with rotated substrates and methods of manufacture thereof

ELLER MANFRED

Semiconductor devices and methods of manufacture thereof

ALVAREZ DAVID

Semiconductor ESD device and method of making same

HAN JIN-PING

Semiconductor device and method of making same

SCHIML THOMAS

Semiconductor devices