P

Inventor

SWAMINATHAN KARTHIK V

US20 patents
⚠️ This page may combine multiple inventors who share the name “SWAMINATHAN KARTHIK V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

19 patents
US9268863B2Feb 23, 2016

Hierarchical in-memory sort engine

IBM14 citations92
US9396143B2Jul 19, 2016

Hierarchical in-memory sort engine

IBM5 citations84
US10365327B2Jul 30, 2019

Determination and correction of physical circuit event related errors of a hardware design

IBM5 citations82
US9424308B2Aug 23, 2016

Hierarchical in-memory sort engine

IBM3 citations73
US12271675B2Apr 8, 2025

Location-aware protection system of latches (LAPS-L)

IBM0 citations62
US11720469B1Aug 8, 2023

Customizing stressmarks in a computer system

IBM1 citations62
US11037650B2Jun 15, 2021

Self-evaluating array of memory

IBM0 citations62
US10607715B2Mar 31, 2020

Self-evaluating array of memory

IBM1 citations62
US11630152B2Apr 18, 2023

Determination and correction of physical circuit event related errors of a hardware design

IBM0 citations61
US11599795B2Mar 7, 2023

Reducing the cost of n modular redundancy for neural networks

IBM1 citations61
US11002791B2May 11, 2021

Determination and correction of physical circuit event related errors of a hardware design

IBM0 citations61
US11334786B2May 17, 2022

System and method for an error-aware runtime configurable memory hierarchy for improved energy efficiency

IBM0 citations59
US10896146B2Jan 19, 2021

Reliability-aware runtime optimal processor configuration

IBM1 citations59
US10831543B2Nov 10, 2020

Contention-aware resource provisioning in heterogeneous processors

IBM1 citations58
US11810340B2Nov 7, 2023

System and method for consensus-based representation and error checking for neural networks

IBM0 citations51
US11016840B2May 25, 2021

Low-overhead error prediction and preemption in deep neural network using apriori network statistics

IBM0 citations51
US10690723B2Jun 23, 2020

Determination and correction of physical circuit event related errors of a hardware design

IBM0 citations51
US10635490B2Apr 28, 2020

Optimization of application workflow in mobile embedded devices

IBM0 citations50
US9690555B2Jun 27, 2017

Optimization of application workflow in mobile embedded devices

IBM1 citations50

NARANG ANKUR

1 patent