Inventor
KOKER ALTUG
US499 patents
Patents
50 patentsUS11360767B2Jun 14, 2022
Instructions and logic to perform floating point and integer operations for machine learning
INTEL CORP39 citations98
US11169799B2Nov 9, 2021
Instructions and logic to perform floating-point and integer operations for machine learning
INTEL CORP36 citations98
US11080046B2Aug 3, 2021
Instructions and logic to perform floating point and integer operations for machine learning
INTEL CORP38 citations98
US10474458B2Nov 12, 2019
Instructions and logic to perform floating-point and integer operations for machine learning
INTEL CORP46 citations98
US10353706B2Jul 16, 2019
Instructions and logic to perform floating-point and integer operations for machine learning
INTEL CORP47 citations98
US10304154B2May 28, 2019
Coordination and increased utilization of graphics processors during inference
INTEL CORP33 citations98
US10186011B2Jan 22, 2019
Programmable coarse grained and sparse matrix compute hardware with advanced scheduling
INTEL CORP37 citations98
US11620256B2Apr 4, 2023
Systems and methods for improving cache efficiency and utilization
INTEL CORP36 citations97
US11113784B2Sep 7, 2021
Sparse optimizations for a matrix accelerator architecture
INTEL CORP46 citations97
US10803548B2Oct 13, 2020
Disaggregation of SOC architecture
INTEL CORP32 citations97
US10108850B1Oct 23, 2018
Recognition, reidentification and security enhancements using autonomous machines
INTEL CORP58 citations97
US10380039B2Aug 13, 2019
Apparatus and method for memory management in a graphics processing environment
INTEL CORP17 citations94
US10282811B2May 7, 2019
Apparatus and method for managing data bias in a graphics processing architecture
INTEL CORP14 citations94
US10043232B1Aug 7, 2018
Compute cluster preemption within a general-purpose graphics processing unit
INTEL CORP22 citations94
US12079155B2Sep 3, 2024
Graphics processor operation scheduling for deterministic latency
INTEL CORP6 citations93
US10332320B2Jun 25, 2019
Autonomous vehicle advanced sensing and response
INTEL CORP26 citations93
US9323684B2Apr 26, 2016
Dynamic cache and memory allocation for memory subsystems
INTEL CORP22 citations93
US10242423B2Mar 26, 2019
Compute optimizations for low precision machine learning operations
INTEL CORP11 citations92
US10013734B1Jul 3, 2018
Programmable controller and command cache for graphics processors
INTEL CORP15 citations92
US6457121B1Sep 24, 2002
Method and apparatus for reordering data in X86 ordering
INTEL CORP18 citations92
US10062429B1Aug 28, 2018
System, apparatus and method for segmenting a memory array
INTEL CORP15 citations89
US12204487B2Jan 21, 2025
Graphics processor data access and sharing
INTEL CORP2 citations86
US12182035B2Dec 31, 2024
Systems and methods for cache optimization
INTEL CORP6 citations86
US11861761B2Jan 2, 2024
Graphics processing unit processing and caching improvements
INTEL CORP8 citations86
US11663746B2May 30, 2023
Systolic arithmetic on sparse data
INTEL CORP12 citations86
US11360808B2Jun 14, 2022
Efficient thread group scheduling
INTEL CORP8 citations86
US11282161B2Mar 22, 2022
Apparatus and method for managing data bias in a graphics processing architecture
INTEL CORP9 citations86
US11210760B2Dec 28, 2021
Programmable coarse grained and sparse matrix compute hardware with advanced scheduling
INTEL CORP9 citations86
US10983594B2Apr 20, 2021
Sensory enhanced augmented reality and virtual reality device
INTEL CORP9 citations86
US12210477B2Jan 28, 2025
Systems and methods for improving cache efficiency and utilization
INTEL CORP2 citations85
US12013808B2Jun 18, 2024
Multi-tile architecture for graphics operations
INTEL CORP3 citations85
US11954062B2Apr 9, 2024
Dynamic memory reconfiguration
INTEL CORP3 citations85
US11756150B2Sep 12, 2023
Disaggregation of system-on-chip (SOC) architecture
INTEL CORP5 citations85
US11755501B2Sep 12, 2023
Efficient data sharing for graphics data processing operations
INTEL CORP9 citations85
US11676239B2Jun 13, 2023
Sparse optimizations for a matrix accelerator architecture
INTEL CORP10 citations85
US11410266B2Aug 9, 2022
Disaggregation of System-On-Chip (SOC) architecture
INTEL CORP6 citations85
US12182062B1Dec 31, 2024
Multi-tile memory management
INTEL CORP2 citations84
US12141094B2Nov 12, 2024
Systolic disaggregation within a matrix accelerator architecture
INTEL CORP2 citations84
US11995029B2May 28, 2024
Multi-tile memory management for detecting cross tile access providing multi-tile inference scaling and providing page migration
INTEL CORP2 citations84
US11899614B2Feb 13, 2024
Instruction based control of memory attributes
INTEL CORP2 citations84
US10909039B2Feb 2, 2021
Data prefetching for graphics data processing
INTEL CORP5 citations84
US10891773B2Jan 12, 2021
Apparatus and method for efficient graphics virtualization
INTEL CORP8 citations84
US10853906B2Dec 1, 2020
Compute optimizations for low precision machine learning operations
INTEL CORP3 citations84
US10726514B2Jul 28, 2020
Compute optimizations for low precision machine learning operations
INTEL CORP5 citations84
US10521875B2Dec 31, 2019
Thread scheduling over compute blocks for power optimization
INTEL CORP5 citations84
US10497084B2Dec 3, 2019
Efficient sharing and compression expansion of data across processing systems
INTEL CORP5 citations84
US10482562B2Nov 19, 2019
Graphics engine partitioning mechanism
INTEL CORP8 citations84
US10452397B2Oct 22, 2019
Efficient multi-context thread distribution
INTEL CORP7 citations84
US10444817B2Oct 15, 2019
System, apparatus and method for increasing performance in a processor during a voltage ramp
INTEL CORP8 citations84
US10430147B2Oct 1, 2019
Collaborative multi-user virtual reality
INTEL CORP9 citations84
Showing the top 50 of 499 patents by PatentIndex Score.