Inventor

PETHE ABHIJIT JAYANT

US23 patents

⚠️ This page may combine multiple inventors who share the name “PETHE ABHIJIT JAYANT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PETHE ABHIJIT JAYANT

INTEL CORP

Integration methods to fabricate internal spacers for nanowire devices

Gate contact structure over active gate and method to fabricate same

Gate-all-around (GAA) transistors with nanowires on an isolation pedestal

Integration methods to fabricate internal spacers for nanowire devices

Gate-all-around (GAA) transistor with stacked nanowires on locally isolated substrate

Gate contact structure over active gate and method to fabricate same

Integration methods to fabricate internal spacers for nanowire devices

Gate contact structure over active gate and method to fabricate same

Semiconductor device having doped epitaxial region and its methods of fabrication

Semiconductor device having doped epitaxial region and its methods of fabrication

Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates

Semiconductor device having doped epitaxial region and its methods of fabrication

Integration methods to fabricate internal spacers for nanowire devices

Integration methods to fabricate internal spacers for nanowire devices

CAPPELLANI ANNALISA

Strained gate-all-around semiconductor devices formed on globally or locally isolated substrates

Methods for fabricating strained gate-all-around semiconductor devices by fin oxidation using an undercut etch-stop layer

Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates

SONY GROUP CORP

Integration methods to fabricate internal spacers for nanowire devices

Integration methods to fabricate internal spacers for nanowire devices

Integration methods to fabricate internal spacers for nanowire devices

KIM SEIYON

Integration methods to fabricate internal spacers for nanowire devices

PETHE ABHIJIT JAYANT

Gate contact structure over active gate and method to fabricate same

MURTHY ANAND S

Semiconductor device having doped epitaxial region and its methods of fabrication