Inventor

HARARI ELI

US105 patents

⚠️ This page may combine multiple inventors who share the name “HARARI ELI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HARARI ELI

SUNRISE MEMORY CORP

Three-dimensional vertical NOR flash thin-film transistor strings

Three-dimensional vertical NOR flash thing-film transistor strings

3-dimensional NOR memory array with very fine pitch: device and method

Three-dimensional vertical NOR flash thin-film transistor strings

Staggered word line architecture for reduced disturb in 3-dimensional NOR memory arrays

Three-dimensional vertical NOR flash thin-film transistor strings

Three-dimensional vertical NOR flash thin-film transistor strings

Three-dimensional vertical NOR flash thin-film transistor strings

Three-dimensional vertical NOR flash thin-film transistor strings

3-dimensional NOR strings with segmented shared source regions

Three-dimensional vertical NOR flash thin-film transistor strings

3-dimensional nor strings with segmented shared source regions

Quasi-volatile system-level memory

3-dimensional NOR string arrays in segmented stacks

3-dimensional NOR memory array architecture and methods for fabrication thereof

Multi-gate nor flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates

Memory circuit, system and method for rapid retrieval of data sets

Three-dimensional vertical nor flash thin-film transistor strings

Three-dimensional vertical nor flash thin-film transistor strings

Vertical thing-film transistor and application as bit-line connector for 3-dimensional memory arrays

3-dimensional NOR memory array architecture and methods for fabrication thereof

Quasi-volatile memory device with a back-channel usage

High capacity memory circuit with low effective latency

3-dimensional NOR strings with segmented shared source regions

Three-dimensional vertical NOR flash thin-film transistor strings

Staggered word line architecture for reduced disturb in 3-dimensional NOR memory arrays

System controller and method for determining the location of the most current data file stored on a plurality of memory circuits

Implementing logic function and generating analog signals using NOR memory strings

Process for forming a vertical thin-film transistor that serves as a connector to a bit-line of a 3-dimensional memory array

3-dimensional memory string array of thin-film ferroelectric transistors

High capacity memory circuit with low effective latency

Channel controller for shared memory access

Staircase structures for electrically connecting multiple horizontal conductive layers of a 3-dimensional memory device

Quasi-volatile memory device with a back-channel usage

Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array

Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array

Cool electron erasing in thin-film storage transistors

Implementing logic function and generating analog signals using NOR memory strings

Methods for forming multilayer horizontal NOR-type thin-film memory strings

Array of nor memory strings and system for rapid data retrieval

Methods for forming multi-layer vertical NOR-type memory string arrays

Method for in situ preparation of antimony-doped silicon and silicon germanium films

Wafer bonding in fabrication of 3-dimensional NOR memory circuits

Device structure for a 3-dimensional NOR memory array and methods for improved erase operations applied thereto

Epitaxial monocrystalline channel for storage transistors in 3-dimensional memory structures and methods for formation thereof

HARARI ELI

Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays

Multi-gate NOR flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates

Three-dimensional vertical NOR flash thin film transistor strings

Methods of fabricating non-volatile memory with air gaps

PURAYATH VINOD ROBERT

Air gap isolation in non-volatile memory