Inventor

MOERTL DANIEL FRANK

US57 patents

⚠️ This page may combine multiple inventors who share the name “MOERTL DANIEL FRANK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MOERTL DANIEL FRANK

IBM

Method and apparatus for implementing error correction coding (ECC) in a dynamic random access memory utilizing vertical ECC storage

System for determining adapter interrupt status where interrupt is sent to host after operating status stored in register is shadowed to host memory

Concurrent maintenance for PCI based DASD subsystem with concurrent maintenance message being communicated between SPCN (system power control network) and I/O adapter using PCI bridge

Interrupt and message batching apparatus and method

System for dynamically configuring I/O device adapters where a function configuration register contains ready/not ready flags corresponding to each I/O device adapter

Peripheral component interconnect (PCI) architecture having hot-plugging capability for a data-processing system

Method and apparatus for implementing infiniband receive function

Apparatus and method of PCI routing in a bridge configuration

Method and apparatus for correlating computer system device physical location with logical address

Message transport mechanisms and methods

Directory rebuild method and apparatus for maintaining and rebuilding directory information for compressed data on direct access storage device (DASD)

Method of mapping multiple address spaces into single PCI bus

Storage method and hierarchical padding structure for direct access storage device (DASD) data compression

Transaction routing system

Device arbitration including peer-to-peer access arbitration

Implementing calibration of DQS sampling during synchronous DRAM reads

Method and apparatus for implementing receive queue for packet-based communications

Adapter card with vendor unique differentiation and customization using PCI sideband signals

Independent control of DMA and I/O resources for mixed-endian computing systems

Method and apparatus for adaptive localization of frequently accessed, randomly addressed data

Apparatus for implementing enhanced vertical ECC storage in a dynamic random access memory

Method for implementing enhanced vertical ECC storage in a dynamic random access memory

Intelligent PCI/PCI-X host bridge

Enhanced reset and built-in self-test mechanisms for single function and multifunction input/output devices

Method and system for compressing data that facilitates high-speed data decompression

Method and system in a data processing system for decompressing multiple compressed bytes in a single machine cycle

Embedded directory method and record for direct access storage device (DASD) data compression

Method and system for maintaining data coherency in a dual input/output adapter utilizing clustered adapters

Method and apparatus implementing error injection for PCI bridges

Bus bridge with embedded input/output (I/O) and transaction tracing capabilities

Implementing calibration of DQS sampling during synchronous DRAM reads

Method and apparatus for implementing queue pair connection protection over infiniband

Method and apparatus for implementing infiniband transmit queue

Input staging logic for latching source synchronous data

Method and apparatus for dynamic PCI combining for PCI bridges

Information routing for transfer buffers

Clock generation for multiple secondary buses of a PCI bridge

Dual storage adapters utilizing clustered adapters supporting fast write caches

Logical to virtual and virtual to physical translation in storage class memory

Method and system for remote function control and delegation within multifunction bus supported devices

Data strobe signals (DQS) for high speed dynamic random access memories (DRAMs)

Buffer re-ordering system

Host request pacing to balance resources and throughput

Storage area network (SAN) fibre channel arbitrated loop (FCAL) multi-system multi-resource storage enclosure and method for performing enclosure maintenance concurrent with device operations

Split completion performance of PCI-X bridges based on data transfer amount

Non-volatile storage class memory data flow with mismatched block sizes

Method and apparatus for implementing global to local queue pair translation

Load/store assist engine

Virtual to physical translation and media repair in storage class memory

WALLS ANDREW DALE

Wear leveling of solid state disks based on usage information of data and parity received from a raid controller