P

Inventor

GALBRAITH ROBERT EDWARD

US33 patents
⚠️ This page may combine multiple inventors who share the name “GALBRAITH ROBERT EDWARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

31 patents
US7487394B2Feb 3, 2009

Recovering from abnormal interruption of a parity update operation in a disk array system

IBM67 citations97
US6192450B1Feb 20, 2001

Destage of data for write cache

IBM96 citations97
US6119209ASep 12, 2000

Backup directory for a write cache

IBM88 citations97
US6857045B2Feb 15, 2005

Method and system for updating data in a compressed read cache

IBM34 citations91
US6877065B2Apr 5, 2005

Advanced read cache management

IBM28 citations90
US6338115B1Jan 8, 2002

Advanced read cache management

IBM23 citations90
US6530003B2Mar 4, 2003

Method and system for maintaining data coherency in a dual input/output adapter utilizing clustered adapters

IBM29 citations89
US6286080B1Sep 4, 2001

Advanced read cache emulation

IBM38 citations88
US6271647B2Aug 7, 2001

Method and apparatus for estimating the service life of a battery

IBM23 citations88
US6191556B1Feb 20, 2001

Method and apparatus for estimating the service life of a battery

IBM28 citations88
US7779335B2Aug 17, 2010

Enhanced error identification with disk array parity checking

IBM10 citations83
US7669107B2Feb 23, 2010

Method and system for increasing parallelism of disk accesses when restoring data in a disk array system

IBM13 citations83
US7392458B2Jun 24, 2008

Method and system for enhanced error identification with disk array parity checking

IBM10 citations83
US6728818B2Apr 27, 2004

Dual storage adapters utilizing clustered adapters supporting fast write caches

IBM18 citations83
US10990537B1Apr 27, 2021

Logical to virtual and virtual to physical translation in storage class memory

IBM9 citations82
US7979655B2Jul 12, 2011

Dynamic optimization of device limits and thresholds in a write cache

IBM15 citations80
US7290199B2Oct 30, 2007

Method and system for improved buffer utilization for disk array parity updates

IBM8 citations73
US11922228B2Mar 5, 2024

Host request pacing to balance resources and throughput

IBM3 citations72
US12032844B2Jul 9, 2024

Management of flash storage media

IBM0 citations62
US11733893B2Aug 22, 2023

Management of flash storage media

IBM0 citations62
US11403034B1Aug 2, 2022

Non-volatile storage class memory data flow with mismatched block sizes

IBM1 citations62
US7392428B2Jun 24, 2008

Method and system for recovering from abnormal interruption of a parity update operation in a disk array system

IBM4 citations62
US10997084B2May 4, 2021

Virtual to physical translation and media repair in storage class memory

IBM0 citations60
US7493370B2Feb 17, 2009

Two stage method for dynamically determining primary adapter in a heterogeneous N-way adapter configuration

IBM4 citations60
US11675707B2Jun 13, 2023

Logical to virtual and virtual to physical translation in storage class memory

IBM0 citations59
US7925837B2Apr 12, 2011

Maintaining write cache and parity update footprint coherency in multiple storage adaptor configuration

IBM2 citations59
US11907123B2Feb 20, 2024

Flash memory garbage collection

IBM0 citations50
US11409664B2Aug 9, 2022

Logical memory allocation and provisioning using timestamps

IBM0 citations49
US11164650B2Nov 2, 2021

Scrub management in storage class memory

IBM0 citations49
US11347609B1May 31, 2022

Failed media channel recovery throttling

IBM0 citations47
US12461871B2Nov 4, 2025

Device control block scan for channel recovery actions

IBM0 citations45

FORHAN CARL EDWARD

1 patent

BAKKE BRIAN ERIC

1 patent