Inventor · disambiguated record
Erik Jan Marinissen
Also filed as: MARINISSEN ERIK J · MARINISSEN ERIK JAN
15 granted patents·2 pending applications·143 citations·filing 1998–2025
93Inventor score
Top patents by PatentIndex Score
17 records- 0190US8593170B2Method and device for testing TSVS in a 3D chip stackVAN DER PLAS GEERT·Filed 2010·Granted Nov 26, 2013·18 cites·18 claims
- 0289US9239359B2Test access architecture for TSV-based 3D stacked ICSIMEC·Filed 2012·Granted Jan 19, 2016·24 cites·20 claims
- 0389US7620866B2Test access architecture and method of testing a module in an electronic circuitNXP BV·Filed 2005·Granted Nov 17, 2009·21 cites·25 claims
- 0488US8773157B2Test circuit for testing through-silicon-vias in 3D integrated circuitsBADAROGLU MUSTAFA·Filed 2011·Granted Jul 8, 2014·12 cites·19 claims
- 0579US9678142B2Two-step interconnect testing of semiconductor diesIMEC·Filed 2014·Granted Jun 13, 2017·5 cites·18 claims
- 0679US8680874B2On-chip testing using time-to-digital conversionMINAS NIKOLAOS·Filed 2011·Granted Mar 25, 2014·7 cites·16 claims
- 0770US9568536B2Transition delay detector for interconnect testIMEC·Filed 2013·Granted Feb 14, 2017·4 cites·17 claims
- 0868US9041411B2Testing of an integrated circuit that contains secret informationMARINISSEN ERIK J·Filed 2006·Granted May 26, 2015·8 cites·13 claims
- 0965US8914689B2Controlled toggle rate of non-test signals during modular scan testing of an integrated circuitMARINISSEN ERIK JAN·Filed 2012·Granted Dec 16, 2014·2 cites·32 claims
- 1061US8539292B2Testing of an integrated circuit that contains secret informationNIEUWLAND ANDRE K·Filed 2006·Granted Sep 17, 2013·6 cites·16 claims
- 1160US6829736B1Method of testing a memoryKONINKL PHILIPS ELECTRONICS NV·Filed 2000·Granted Dec 7, 2004·12 cites·6 claims
- 1255US2025323150A1Interconnect Repair MultiplexingIMEC VZW·Filed 2025·Application pending·0 cites
- 1352US6721911B1Method and apparatus for testing a memory array using compressed responsesKONINKL PHILIPS ELECTRONICS NV·Filed 2000·Granted Apr 13, 2004·8 cites·11 claims
- 1447US7475317B2Automatic test pattern generationKONINKL PHILIPS ELECTRONICS NV·Filed 2004·Granted Jan 6, 2009·4 cites·11 claims
- 1534US6061284ACore test controlPHILIPS CORP·Filed 1998·Granted May 9, 2000·10 cites·4 claims
- 1630US2006259842A1Automatic test pattern generationMARINISSEN ERIK J·Filed 2004·Application pending·0 cites
- 1721US6330698B1Method for making a digital circuit testable via scan testPHILIPS CORP·Filed 1998·Granted Dec 11, 2001·2 cites·12 claims
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