Inventor

WU YUN-CHI

TW48 patents

⚠️ This page may combine multiple inventors who share the name “WU YUN-CHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WU YUN-CHI

TAIWAN SEMICONDUCTOR MFG CO LTD

Deep trench isolation structure and method of making the same

Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology

Method for manufacturing embedded memory using high-K-metal-gate (HKMG) technology

Semiconductor device

Semiconductor arrangement and method of manufacture

Deep trench isolation structure and method of making the same

Semiconductor device including non-volatile memory cells

Semiconductor arrangement and method of manufacture

Method of manufacturing a semiconductor device including non-volatile memory cells

Integrated circuit and method for manufacturing the same

Semiconductor device including non-volatile memory cells

Semiconductor device having fully oxidized gate oxide layer and method for making the same

Embedded flash memory cell including a tunnel dielectric layer having different thicknesses over a memory region

Integrated chip having a logic gate electrode and a tunnel dielectric layer

Method for manufacturing memory device and method for manufacturing shallow trench isolation

Semiconductor arrangement including first and second gate electrodes and method of manufacture

Deep trench isolation structure and method of making the same

Semiconductor arrangement and method for making

Integrated circuit structure

Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology

Semiconductor device having fully oxidized gate oxide layer and method for making the same

Semiconductor arrangement and method of manufacture

Semiconductor structure

Semiconductor arrangement and method for making

Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology

Integrated circuit structure and method for forming the same

Semiconductor structure and method for forming the same

Integrated circuit with different memory gate work functions

Semiconductor arrangement and method for making

Memory device

Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology

Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology

Memory device and method for fabricating the same

Method of forming high voltage transistor and structure resulting therefrom

Integrated chip including a tunnel dielectric layer which has different thicknesses over a protrusion region of a substrate

Semiconductor device and method of manufacturing the same

Method of manufacturing a semiconductor device and a semiconductor device

Method of manufacturing a semiconductor device and a semiconductor device

Gate electrode extending into a shallow trench isolation structure in high voltage devices

Gate electrode extending into a shallow trench isolation structure in high voltage devices

Memory cell comprising a metal control gate with a work function for an enlarged operation window

Integrated circuit and method for manufacturing the same

Semiconductor structures and manufacturing method thereof

Semiconductor isolation structure and method of making the same

Method of manufacturing a semiconductor device and a semiconductor device

Method of manufacturing a semiconductor device and a semiconductor device

Method to fabricate uniform tunneling dielectric of embedded flash memory cell

UNIV NAT CHIAO TUNG

Structure of high electron mobility transistor, a device comprising the structure and a method of producing the same