Inventor

LIU CHANG-MIAO

TW63 patents

⚠️ This page may combine multiple inventors who share the name “LIU CHANG-MIAO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIU CHANG-MIAO

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device structure with metal gate stack

Methods of forming a FinFET device

Semiconductor device with air spacer and stress liner

Gate structures for semiconductor devices

Semiconductor device with corner isolation protection and methods of forming the same

Method and structure for gate-all-around devices

Isolation structures in multi-gate semiconductor devices and methods of fabricating the same

Gate structures for semiconductor devices

Isolation structures in multi-gate semiconductor devices and methods of fabricating the same

Devices with strained isolation features

Doping for semiconductor device with conductive feature

Dielectric fins with air gap and backside self-aligned contact

Semiconductor device with air gaps between metal gates and method of forming the same

Dielectric constant reduction of gate spacer

Enlarged backside contact

Isolation structures in multi-gate semiconductor devices and methods of fabricating the same

Methods of forming a semiconductor device with corner isolation protection

Gate structures for semiconductor devices

Semiconductor device structure with metal gate stack

Stress-inducing silicon liner in semiconductor devices

Semiconductor device with air gaps between metal gates and method of forming the same

Doping for semiconductor device with conductive feature

Method of forming a FinFET device

Semiconductor device structure and method for forming the same

Semiconductor device having contact feature and method of fabricating the same

Devices with strained isolation features

Semiconductor device with air gaps between metal gates and method of forming the same

Doping for semiconductor device with conductive feature

Stress-inducing silicon liner in semiconductor devices

Method of forming a FinFET device

Doping for semiconductor device with conductive feature

Integrated circuits with channel-strain liner

Semiconductor device having contact feature and method of fabricating the same

Multi-layer fin structure

Integrated circuits with channel-strain liner

Method of forming transistors of different configurations

Integrated circuit structure with source/drain spacers

Isolation for multigate devices

Methods for forming multi-gate transistors

Air spacer formation for semiconductor devices

Semiconductor devices with air gaps and the method thereof

Semiconductor devices and methods of fabricating the same

Methods for forming multi-gate transistors

Source/drain spacer with air gap in semiconductor devices and methods of fabricating the same

Method of forming transistors of different configurations

Integrated circuit structure with source/drain spacers

Dielectric fins with air gap and backside self-aligned contact

Air spacer formation for semiconductor devices

Method of forming transistors of different configurations

UNITED MICROELECTRONICS CORP

Method for making a HVMOS transistor