Inventor

TSAI CURTIS

US30 patents

⚠️ This page may combine multiple inventors who share the name “TSAI CURTIS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSAI CURTIS

INTEL CORP

Methods of integrating multiple gate dielectric transistors on a tri-gate (finFET) process

High voltage three-dimensional devices having dielectric liners

Transistor architecture having extended recessed spacer and source/drain regions and method of making same

Antifuse element utilizing non-planar topology

On-chip through-body-via capacitors and techniques for forming same

Vertical non-planar semiconductor device for system-on-chip (SoC) applications

Methods of integrating multiple gate dielectric transistors on a tri-gate (finfet) process

High voltage three-dimensional devices having dielectric liners

High voltage three-dimensional devices having dielectric liners

Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) process

High voltage three-dimensional devices having dielectric liners

High voltage three-dimensional devices having dielectric liners

Substrate-less electrostatic discharge (ESD) integrated circuit structures

Vertical transistor using a through silicon via gate

Substrate-free integrated circuit structures

Dipole threshold voltage tuning for high voltage transistor stacks

High voltage three-dimensional devices having dielectric liners

High voltage three-dimensional devices having dielectric liners

Vertical non-planar semiconductor device for system-on-chip (SoC) applications

High voltage three-dimensional devices having dielectric liners

Low leakage non-planar access transistor for embedded dynamic random access memory (eDRAM)

Nanowire transistors and methods of fabrication

HAFEZ WALID M

Antifuse element utilizing non-planar topology

High voltage three-dimensional devices having dielectric liners

High voltage three-dimensional devices having dielectric liners

YEH JENG-YA D

Precision resistor for non-planar semiconductor device architecture

Precision resistor for non-planar semiconductor device architecture

ANALOG DEVICES INC

Double-spacer technique for forming a bipolar transistor with a very narrow emitter

TSAI CURTIS

Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) process

JAN CHIA-HONG

Multi-gate transistors