Inventor
HARRIS GLEN ANDREW
US14 patents
⚠️ This page may combine multiple inventors who share the name “HARRIS GLEN ANDREW”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ADVANCED RISC MACH LTD
10 patentsUS8386754B2Feb 26, 2013
Renaming wide register source operand with plural short register source operands for select instructions to detect dependency fast with existing mechanism
ADVANCED RISC MACH LTD9 citations81
US7234043B2Jun 19, 2007
Decoding predication instructions within a superscaler data processing system
ADVANCED RISC MACH LTD8 citations73
US7958335B2Jun 7, 2011
Multiple instruction set decoding
ADVANCED RISC MACH LTD6 citations62
US7774582B2Aug 10, 2010
Result bypassing to override a data hazard within a superscalar processor
ADVANCED RISC MACH LTD3 citations61
US11204773B2Dec 21, 2021
Storing a processing state based on confidence in a predicted branch outcome and a number of recent state changes
ADVANCED RISC MACH LTD0 citations51
US7496899B2Feb 24, 2009
Preventing loss of traced information in a data processing apparatus
ADVANCED RISC MACH LTD1 citations51
US12175251B2Dec 24, 2024
Compression of entries in a reorder buffer
ADVANCED RISC MACH LTD0 citations49
US12204785B2Jan 21, 2025
Memcpy micro-operation reduction
ADVANCED RISC MACH LTD0 citations47
US11663014B2May 30, 2023
Speculatively executing instructions that follow a status updating instruction
ADVANCED RISC MACH LTD0 citations44
US10310862B2Jun 4, 2019
Data processing
ADVANCED RISC MACH LTD0 citations40
HARDAGE JAMES NOLAN
3 patentsUS9081581B2Jul 14, 2015
Size mis-match hazard detection
HARDAGE JAMES NOLAN2 citations59
US9946545B2Apr 17, 2018
Buffer store with a main store and and auxiliary store
HARDAGE JAMES NOLAN0 citations34
US8972701B2Mar 3, 2015
Setting zero bits in architectural register for storing destination operand of smaller size based on corresponding zero flag attached to renamed physical register
HARDAGE JAMES NOLAN0 citations34