P

Inventor

VARADARAJAN DEVANATHAN

US26 patents

Patents

26 patents
US7277803B2Oct 2, 2007

Efficient calculation of a number of transitions and estimation of power dissipation in sequential scan tests

TEXAS INSTRUMENTS INC11 citations83
US10134483B2Nov 20, 2018

Centralized built-in soft-repair architecture for integrated circuits with embedded memories

TEXAS INSTRUMENTS INC11 citations81
US9852810B2Dec 26, 2017

Optimizing fuseROM usage for memory repair

TEXAS INSTRUMENTS INC8 citations81
US9053799B2Jun 9, 2015

Optimizing fuseROM usage for memory repair

TEXAS INSTRUMENTS INC8 citations81
US10600495B2Mar 24, 2020

Parallel memory self-testing

TEXAS INSTRUMENTS INC8 citations79
US9318222B2Apr 19, 2016

Hierarchical, distributed built-in self-repair solution

TEXAS INSTRUMENTS INC7 citations77
US11436090B2Sep 6, 2022

Non-volatile memory compression for memory repair

TEXAS INSTRUMENTS INC3 citations73
US8051347B2Nov 1, 2011

Scan-enabled method and system for testing a system-on-chip

TEXAS INSTRUMENTS INC8 citations73
US11568951B2Jan 31, 2023

Screening of memory circuits

TEXAS INSTRUMENTS INC2 citations68
US9698779B2Jul 4, 2017

Reconfiguring an ASIC at runtime

TEXAS INSTRUMENTS INC2 citations67
US12525314B2Jan 13, 2026

Built-in memory repair with repair code compression

TEXAS INSTRUMENTS INC0 citations62
US12283332B2Apr 22, 2025

Memory BIST circuit and method

TEXAS INSTRUMENTS INC0 citations62
US12259789B2Mar 25, 2025

Non-volatile memory compression for memory repair

TEXAS INSTRUMENTS INC0 citations62
US12243603B2Mar 4, 2025

At-speed test of functional memory interface logic in devices

TEXAS INSTRUMENTS INC0 citations62
US12147697B2Nov 19, 2024

Methods and apparatus to characterize memory

TEXAS INSTRUMENTS INC0 citations62
US12033711B2Jul 9, 2024

Built-in memory repair with repair code compression

TEXAS INSTRUMENTS INC0 citations62
US12009045B2Jun 11, 2024

Management of multiple memory in-field self-repair options

TEXAS INSTRUMENTS INC0 citations62
US11748202B2Sep 5, 2023

Non-volatile memory compression for memory repair

TEXAS INSTRUMENTS INC0 citations62
US11631472B2Apr 18, 2023

Built-in memory repair with repair code compression

TEXAS INSTRUMENTS INC0 citations62
US11373726B2Jun 28, 2022

Management of multiple memory in-field self-repair options

TEXAS INSTRUMENTS INC1 citations62
US11087857B2Aug 10, 2021

Enabling high at-speed test coverage of functional memory interface logic by selective usage of test paths

TEXAS INSTRUMENTS INC0 citations62
US7555687B2Jun 30, 2009

Sequential scan technique for testing integrated circuits with reduced power, time and/or cost

TEXAS INSTRUMENTS INC3 citations62
US12085610B2Sep 10, 2024

Methods and apparatus to identify faults in processors

TEXAS INSTRUMENTS INC0 citations57
US11881275B2Jan 23, 2024

Screening of memory circuits

TEXAS INSTRUMENTS INC0 citations57
US12217102B2Feb 4, 2025

Distributed mechanism for fine-grained test power control

TEXAS INSTRUMENTS INC0 citations51
US7380184B2May 27, 2008

Sequential scan technique providing enhanced fault coverage in an integrated circuit

TEXAS INSTRUMENTS INC0 citations41