Inventor
SCHAECHER MARK A
US5 patents
Patents
5 patentsUS6434736B1Aug 13, 2002
Location based timing scheme in memory design
INTEL CORP160 citations96
US6449694B1Sep 10, 2002
Low power cache operation through the use of partial tag comparison
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US10014710B2Jul 3, 2018
Foldable fabric-based packaging solution
INTEL CORP5 citations72
US6608779B1Aug 19, 2003
Method and apparatus for low power memory
INTEL CORP7 citations70
US6690607B2Feb 10, 2004
Method and apparatus for low power memory
INTEL CORP4 citations59