Inventor
LIN RUEI-LING
TW25 patents
⚠️ This page may combine multiple inventors who share the name “LIN RUEI-LING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG
10 patentsUS5851881ADec 22, 1998
Method of making monos flash memory for multi-level logic
TAIWAN SEMICONDUCTOR MFG140 citations99
US5714412AFeb 3, 1998
Multi-level, split-gate, flash memory cell and method of manufacture thereof
TAIWAN SEMICONDUCTOR MFG137 citations99
US6281545B1Aug 28, 2001
Multi-level, split-gate, flash memory cell
TAIWAN SEMICONDUCTOR MFG98 citations98
US5877523AMar 2, 1999
Multi-level split- gate flash memory cell
TAIWAN SEMICONDUCTOR MFG114 citations98
US5679591AOct 21, 1997
Method of making raised-bitline contactless trenched flash memory cell
TAIWAN SEMICONDUCTOR MFG120 citations98
US6166410ADec 26, 2000
MONOS flash memory for multi-level logic and method thereof
TAIWAN SEMICONDUCTOR MFG40 citations92
US5834806ANov 10, 1998
Raised-bitline, contactless, trenched, flash memory cell
TAIWAN SEMICONDUCTOR MFG22 citations92
US6054348AApr 25, 2000
Self-aligned source process
TAIWAN SEMICONDUCTOR MFG18 citations84
US6566703B1May 20, 2003
High speed flash memory with high coupling ratio
TAIWAN SEMICONDUCTOR MFG11 citations74
US5923974AJul 13, 1999
Method of manufacture of memory device with high coupling ratio
TAIWAN SEMICONDUCTOR MFG13 citations74
VIA TECH INC
9 patentsUS7624286B2Nov 24, 2009
Power management method of north bridge
VIA TECH INC16 citations92
US7610497B2Oct 27, 2009
Power management system with a bridge logic having analyzers for monitoring data quantity to modify operating clock and voltage of the processor and main memory
VIA TECH INC18 citations92
US7590876B2Sep 15, 2009
Method for adjusting a frequency working between a north bridge chip and a random access memory of a computer system
VIA TECH INC8 citations78
US7475263B2Jan 6, 2009
Method for power management of central processor unit
VIA TECH INC7 citations73
US7315953B2Jan 1, 2008
Apparatus and related method of coordinating north bridge and south bridge for processing bus master requests of peripheral devices for controlling a central processing unit to operate in a power-saving state
VIA TECH INC8 citations73
US7047336B2May 16, 2006
Method for blocking request to bus
VIA TECH INC5 citations61
US7782313B2Aug 24, 2010
Reducing power during idle state
VIA TECH INC2 citations57
US7757031B2Jul 13, 2010
Data transmission coordinating method and system
VIA TECH INC0 citations42
US7634609B2Dec 15, 2009
Data transmission coordinating method
VIA TECH INC0 citations42
UNITED MICROELECTRONICS CORP
4 patentsUS5851879ADec 22, 1998
Method for fabricating compact contactless trenched flash memory cell
UNITED MICROELECTRONICS CORP29 citations92
US5796142AAug 18, 1998
SOI compact contactless flash memory cell
UNITED MICROELECTRONICS CORP28 citations92
US5796141AAug 18, 1998
Compact contactless trenched flash memory cell
UNITED MICROELECTRONICS CORP18 citations92
US5885868AMar 23, 1999
Process for fabricating SOI compact contactless flash memory cell
UNITED MICROELECTRONICS CORP11 citations74