Inventor
SCHWARZENBACH WALTER
FR53 patents
⚠️ This page may combine multiple inventors who share the name “SCHWARZENBACH WALTER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SOITEC SILICON ON INSULATOR
42 patentsUS6828216B2Dec 7, 2004
Process for detaching layers of material
SOITEC SILICON ON INSULATOR21 citations93
US9576798B2Feb 21, 2017
Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers
SOITEC SILICON ON INSULATOR11 citations84
US9209301B1Dec 8, 2015
Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers
SOITEC SILICON ON INSULATOR14 citations84
US7749862B2Jul 6, 2010
Methods for minimizing defects when transferring a semiconductor useful layer
SOITEC SILICON ON INSULATOR14 citations83
US7645682B2Jan 12, 2010
Bonding interface quality by cold cleaning and hot bonding
SOITEC SILICON ON INSULATOR8 citations83
US10957577B2Mar 23, 2021
Method for fabricating a strained semiconductor-on-insulator substrate
SOITEC SILICON ON INSULATOR7 citations82
US6987051B2Jan 17, 2006
Method of making cavities in a semiconductor wafer
SOITEC SILICON ON INSULATOR9 citations74
US11552123B2Jan 10, 2023
Front-side type image sensors
SOITEC SILICON ON INSULATOR1 citations73
US10903263B2Jan 26, 2021
Front-side type image sensor and method for manufacturing such a sensor
SOITEC SILICON ON INSULATOR1 citations73
US11282889B2Mar 22, 2022
Substrate for a front-side-type image sensor and method for producing such a substrate
SOITEC SILICON ON INSULATOR2 citations70
US7300856B2Nov 27, 2007
Process for detaching layers of material
SOITEC SILICON ON INSULATOR2 citations63
US6833314B2Dec 21, 2004
Method of characterizing implantation of a species in a substrate by surface imaging
SOITEC SILICON ON INSULATOR4 citations63
US12272720B2Apr 8, 2025
Front-side type image sensors
SOITEC SILICON ON INSULATOR0 citations62
US12198975B2Jan 14, 2025
Semiconductor on insulator structure for a front side type imager
SOITEC SILICON ON INSULATOR0 citations62
US12074056B2Aug 27, 2024
Method for producing an advanced substrate for hybrid integration
SOITEC SILICON ON INSULATOR0 citations62
US11476153B2Oct 18, 2022
Method for producing an advanced substrate for hybrid integration
SOITEC SILICON ON INSULATOR0 citations62
US11127624B2Sep 21, 2021
Method of manufacturing a semiconductor on insulator type structure, notably for a front side type imager
SOITEC SILICON ON INSULATOR0 citations62
US8349703B2Jan 8, 2013
Method of bonding two substrates
SOITEC SILICON ON INSULATOR2 citations62
US7892861B2Feb 22, 2011
Method for fabricating a compound-material wafer
SOITEC SILICON ON INSULATOR2 citations62
US12261079B2Mar 25, 2025
Method for fabricating a strained semiconductor-on-insulator substrate
SOITEC SILICON ON INSULATOR0 citations60
US11876020B2Jan 16, 2024
Method for manufacturing a CFET device
SOITEC SILICON ON INSULATOR1 citations60
US11855120B2Dec 26, 2023
Substrate for a front-side-type image sensor and method for producing such a substrate
SOITEC SILICON ON INSULATOR0 citations60
US11728207B2Aug 15, 2023
Method for fabricating a strained semiconductor-on-insulator substrate
SOITEC SILICON ON INSULATOR0 citations60
US11127775B2Sep 21, 2021
Substrate for front side type imager and method of manufacturing such a substrate
SOITEC SILICON ON INSULATOR0 citations60
US10672646B2Jun 2, 2020
Method for fabricating a strained semiconductor-on-insulator substrate
SOITEC SILICON ON INSULATOR1 citations60
US12476134B2Nov 18, 2025
Semiconductor structure for digital and radiofrequency applications, and method for manufacturing such a structure
SOITEC SILICON ON INSULATOR0 citations59
US8357587B2Jan 22, 2013
Method for routing a chamfered substrate
SOITEC SILICON ON INSULATOR2 citations59
US12176244B2Dec 24, 2024
Method for bonding two substrates
SOITEC SILICON ON INSULATOR0 citations56
US12218201B2Feb 4, 2025
Device architectures with tensile and compressive strained substrates
SOITEC SILICON ON INSULATOR0 citations54
US11205702B2Dec 21, 2021
Method for manufacturing a structure for forming a tridimensional monolithic integrated circuit
SOITEC SILICON ON INSULATOR0 citations52
US7465645B2Dec 16, 2008
Method of detaching a layer from a wafer using a localized starting area
SOITEC SILICON ON INSULATOR1 citations52
US7871900B2Jan 18, 2011
Quality of a thin layer through high-temperature thermal annealing
SOITEC SILICON ON INSULATOR1 citations51
US12100727B2Sep 24, 2024
Method for manufacturing a substrate for a front-facing image sensor
SOITEC SILICON ON INSULATOR0 citations50
US7466907B2Dec 16, 2008
Annealing process and device of semiconductor wafer
SOITEC SILICON ON INSULATOR0 citations50
US7098148B2Aug 29, 2006
Method for heat treating a semiconductor wafer
SOITEC SILICON ON INSULATOR1 citations50
US7094668B2Aug 22, 2006
Annealing process and device of semiconductor wafer
SOITEC SILICON ON INSULATOR0 citations50
US9190284B2Nov 17, 2015
Process for treating a semiconductor-on-insulator structure for improving thickness uniformity of the semiconductor layer
SOITEC SILICON ON INSULATOR1 citations49
US8728913B2May 20, 2014
Method for transferring a layer from a donor substrate onto a handle substrate
SOITEC SILICON ON INSULATOR0 citations49
US7544058B2Jun 9, 2009
Method for high-temperature annealing a multilayer wafer
SOITEC SILICON ON INSULATOR0 citations49
US7648888B2Jan 19, 2010
Apparatus and method for splitting substrates
SOITEC SILICON ON INSULATOR0 citations48
US7017570B2Mar 28, 2006
Apparatus and method for splitting substrates
SOITEC SILICON ON INSULATOR1 citations48
US12148755B2Nov 19, 2024
Front-side-type image sensor
SOITEC SILICON ON INSULATOR0 citations46
SCHWARZENBACH WALTER
3 patentsUS8617962B2Dec 31, 2013
Method for finishing a substrate of the semiconductor-on-insulator type
SCHWARZENBACH WALTER2 citations57
US8389412B2Mar 5, 2013
Finishing method for a silicon on insulator substrate
SCHWARZENBACH WALTER1 citations49
US8088671B2Jan 3, 2012
Defectivity of post thin layer separation by modification of its separation annealing
SCHWARZENBACH WALTER0 citations43
TETRA PAK SUISSE SA
1 patentS O I TECH SILICON ON INSULATO
1 patentKERDILES SEBASTIEN
1 patentALAMI-IDRISSI AZIZ
1 patentSOULIER-BOUCHET BRIGITTE
1 patentShowing the top 50 of 53 patents by PatentIndex Score.