Inventor
FULLER PAUL M
US7 patents
Patents
7 patentsUS6889357B1May 3, 2005
Timing calibration pattern for SLDRAM
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US6550026B1Apr 15, 2003
High speed test system for a memory device
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US6154860ANov 28, 2000
High-speed test system for a memory device
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US5966388AOct 12, 1999
High-speed test system for a memory device
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US6055611AApr 25, 2000
Method and apparatus for enabling redundant memory
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US5945845AAug 31, 1999
Method and apparatus for enhanced booting and DC conditions
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US5783948AJul 21, 1998
Method and apparatus for enhanced booting and DC conditions
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