P

Inventor

RESTLE PHILLIP JOHN

US23 patents
⚠️ This page may combine multiple inventors who share the name “RESTLE PHILLIP JOHN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

20 patents
US6311313B1Oct 30, 2001

X-Y grid tree clock distribution network with tunable tree and grid networks

IBM196 citations98
US6205571B1Mar 20, 2001

X-Y grid tree tuning method

IBM104 citations97
US8736342B1May 27, 2014

Changing resonant clock modes

IBM21 citations91
US6006025ADec 21, 1999

Method of clock routing for semiconductor chips

IBM52 citations91
US6342823B1Jan 29, 2002

System and method for reducing calculation complexity of lossy, frequency-dependent transmission-line computation

IBM37 citations90
US10171081B1Jan 1, 2019

On-chip supply noise voltage reduction or mitigation using local detection loops in a processor core

IBM11 citations84
US10552250B2Feb 4, 2020

Proactive voltage droop reduction and/or mitigation in a processor core

IBM6 citations83
US7962887B2Jun 14, 2011

Self-learning of the optimal power or performance operating point of a computer chip based on instantaneous feedback of present operating environment

IBM7 citations81
US7941689B2May 10, 2011

Minimizing clock uncertainty on clock distribution networks using a multi-level de-skewing technique

IBM9 citations76
US11275644B2Mar 15, 2022

Proactive voltage droop reduction and/or mitigation in a processor core

IBM4 citations72
US11693728B2Jul 4, 2023

Proactive voltage droop reduction and/or mitigation in a processor core

IBM0 citations62
US11561595B2Jan 24, 2023

On-chip supply noise voltage reduction or mitigation using local detection loops

IBM0 citations62
US11073884B2Jul 27, 2021

On-chip supply noise voltage reduction or mitigation using local detection loops

IBM0 citations62
US8775996B2Jul 8, 2014

Direct current circuit analysis based clock network design

IBM3 citations60
US11989071B2May 21, 2024

Dynamic guard band with timing protection and with performance protection

IBM1 citations58
US12189415B2Jan 7, 2025

Providing deterministic frequency and voltage enhancements for a processor

IBM0 citations53
US10333520B2Jun 25, 2019

On-chip supply noise voltage reduction or mitigation using local detection loops in a processor core

IBM0 citations52
US10666415B2May 26, 2020

Determining clock signal quality using a plurality of sensors

IBM0 citations51
US10652006B2May 12, 2020

Determining clock signal quality using a plurality of sensors

IBM0 citations51
US11953982B2Apr 9, 2024

Dynamic guard band with timing protection and with performance protection

IBM0 citations47

CARPENTER GARY DALE

1 patent

PANG LIANG-TECK

1 patent

ALPERT CHARLES JAY

1 patent