Inventor
SHARPE-GEISLER BRAD
US30 patents
⚠️ This page may combine multiple inventors who share the name “SHARPE-GEISLER BRAD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LATTICE SEMICONDUCTOR CORP
27 patentsUS7098685B1Aug 29, 2006
Scalable serializer-deserializer architecture and programmable interface
LATTICE SEMICONDUCTOR CORP56 citations95
US7376037B1May 20, 2008
Programmable logic device with power-saving architecture
LATTICE SEMICONDUCTOR CORP25 citations92
US7342838B1Mar 11, 2008
Programmable logic device with a double data rate SDRAM interface
LATTICE SEMICONDUCTOR CORP29 citations92
US7741865B1Jun 22, 2010
Soft error upset hardened integrated circuit systems and methods
LATTICE SEMICONDUCTOR CORP14 citations84
US7256613B1Aug 14, 2007
Programmable interconnect architecture for programmable logic devices
LATTICE SEMICONDUCTOR CORP12 citations84
US10079054B1Sep 18, 2018
Selective power gating of routing resource configuration memory bits for programmable logic devices
LATTICE SEMICONDUCTOR CORP10 citations83
US8971146B2Mar 3, 2015
Dual-port SRAM with bit line clamping
LATTICE SEMICONDUCTOR CORP5 citations82
US8643168B1Feb 4, 2014
Integrated circuit package with input capacitance compensation
LATTICE SEMICONDUCTOR CORP5 citations82
US7558143B1Jul 7, 2009
Programmable logic device with power-saving architecture
LATTICE SEMICONDUCTOR CORP6 citations73
US10417078B2Sep 17, 2019
Deterministic read back and error detection for programmable logic devices
LATTICE SEMICONDUCTOR CORP2 citations72
US9735761B2Aug 15, 2017
Flexible ripple mode device implementation for programmable logic devices
LATTICE SEMICONDUCTOR CORP2 citations72
US9716491B2Jul 25, 2017
Multiple mode device implementation for programmable logic devices
LATTICE SEMICONDUCTOR CORP2 citations72
US9537308B2Jan 3, 2017
ESD protection using shared RC trigger
LATTICE SEMICONDUCTOR CORP3 citations68
US7868646B1Jan 11, 2011
Soft error upset hardened integrated circuit systems and methods
LATTICE SEMICONDUCTOR CORP5 citations63
US7787326B1Aug 31, 2010
Programmable logic device with a multi-data rate SDRAM interface
LATTICE SEMICONDUCTOR CORP4 citations62
US7576563B1Aug 18, 2009
High fan-out signal routing systems and methods
LATTICE SEMICONDUCTOR CORP5 citations61
US7355441B1Apr 8, 2008
Programmable logic devices with distributed memory and non-volatile memory
LATTICE SEMICONDUCTOR CORP5 citations60
US9287872B2Mar 15, 2016
PVT compensation scheme for output buffers
LATTICE SEMICONDUCTOR CORP2 citations59
US11206025B2Dec 21, 2021
Input/output bus protection systems and methods for programmable logic devices
LATTICE SEMICONDUCTOR CORP0 citations51
US10630269B2Apr 21, 2020
Multiple mode device implementation for programmable logic devices
LATTICE SEMICONDUCTOR CORP0 citations51
US10382021B2Aug 13, 2019
Flexible ripple mode device implementation for programmable logic devices
LATTICE SEMICONDUCTOR CORP0 citations51
US10141917B2Nov 27, 2018
Multiple mode device implementation for programmable logic devices
LATTICE SEMICONDUCTOR CORP0 citations51
US9543950B2Jan 10, 2017
High speed complementary NMOS LUT logic
LATTICE SEMICONDUCTOR CORP0 citations51
US9252755B1Feb 2, 2016
Shared logic for multiple registers with asynchronous initialization
LATTICE SEMICONDUCTOR CORP0 citations51
US7459935B1Dec 2, 2008
Programmable logic devices with distributed memory
LATTICE SEMICONDUCTOR CORP0 citations49
US9515643B2Dec 6, 2016
Hot-socket circuitry
LATTICE SEMICONDUCTOR CORP0 citations48
US7411419B1Aug 12, 2008
Input/output systems and methods
LATTICE SEMICONDUCTOR CORP0 citations41