Inventor

DOSHI KSHITIJ A

US107 patents

⚠️ This page may combine multiple inventors who share the name “DOSHI KSHITIJ A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DOSHI KSHITIJ A

INTEL CORP

Microservices architecture

Protecting memory by containing pointer accesses

Protected data accesses using remote copy operations

Technologies for providing streamlined provisioning of accelerated functions in a disaggregated architecture

Techniques to manage training or trained models for deep learning applications

Microservices architecture

Persistent commit processors, methods, systems, and instructions

Techniques to manage training or trained models for deep learning applications

Technologies for providing certified telemetry data indicative of resources utilizations

Technologies for providing hardware resources as a service with direct resource addressability

Controlling displacement in a co-operative and adaptive multiple-level memory system

Processing devices to perform a key value lookup instruction

Providing vector horizontal compare functionality within a vector register

Persistent commit processors, methods, systems, and instructions

Fault tolerance and detection by replication of input data and evaluating a packed data execution result

Byte and nibble sort instructions that produce sorted destination register and destination index mapping

Instruction and logic for characterization of data access

Instruction and logic for adaptive dataset priorities in processor caches

Techniques to control quality of service for end-to-end paths in a compute environment

Shared memory for intelligent network interface cards

Methods and apparatus to determine provenance for data supply chains

Techniques to control quality of service for end-to-end paths in a compute environment

Shared memory for intelligent network interface cards

Apparatus and methods for implementing cluster-wide operational metrics access for coordinated agile scheduling

Bit matrix multiplication

Techniques to achieve ordering among storage device transactions

Method and apparatus for compaction of data received over a network

Distributed persistent memory using asynchronous streaming of log records

Network interface device facilitating transaction assurance

Potential collision warning system based on road user intent prediction

Container-first architecture

Adaptive collaborative memory with the assistance of programmable networking devices

Infrastructure processing unit

Computing resource discovery and allocation

Technologies for providing hardware resources as a service with direct resource addressability

Object coherence in distributed shared memory systems

Vector cache line write back processors, methods, systems, and instructions

Transaction end plus commit to persistence instructions, processors, methods, and systems

Techniques to control quality of service for end-to-end paths in a compute environment

System decoder for training accelerators

Techniques for artificial intelligence capabilities at a network device

Protected data accesses using remote copy operations

Microservices architecture

OULD-AHMED-VALL ELMOUSTAPHA

Instruction and logic to provide stride-based vector load-op functionality with mask duplication

Gather-op instruction to duplicate a mask and perform an operation on vector elements gathered via tracked offset-based gathering

Efficient zero-based decompression

Instruction and logic to provide vector horizontal majority voting functionality

Instruction and logic to provide vector loads with strides and masking functionality

DOSHI KSHITIJ A

Identity broker tools and techniques for use with forward proxy computers

MCAFEE INC

Service assurance and security of computing systems using fingerprinting