Inventor
SAILER STUART E
US6 patents
Patents
6 patentsUS6542966B1Apr 1, 2003
Method and apparatus for managing temporal and non-temporal data in a single cache structure
INTEL CORP54 citations95
US6272597B1Aug 7, 2001
Dual-ported, pipelined, two level cache system
INTEL CORP60 citations95
US5761444AJun 2, 1998
Method and apparatus for dynamically deferring transactions
INTEL CORP55 citations95
US6418521B1Jul 9, 2002
Hierarchical fully-associative-translation lookaside buffer structure
INTEL CORP60 citations93
US6381678B2Apr 30, 2002
Processing ordered data requests to a memory
INTEL CORP17 citations91
US6725339B2Apr 20, 2004
Processing ordered data requests to a memory
INTEL CORP7 citations72