Inventor

WILEY GEORGE ALAN

US98 patents

⚠️ This page may combine multiple inventors who share the name “WILEY GEORGE ALAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WILEY GEORGE ALAN

QUALCOMM INC

Generating and implementing a communication protocol and interface for high data rate signal transfer

N-phase polarity output pin mode multiplexer

Double data rate serial encoder

C-PHY receiver equalization

Time based equalization for a C-PHY 3-phase transmitter

Multi-wire signaling with matched propagation delay among wire pairs

Three phase and polarity encoded serial interface

Adaptation to 3-phase signal swap within a trio

N-phase phase and polarity encoded serial interface

Method and apparatus to enable multiple masters to operate in a single master bus architecture

Multiphase preamble data sequences for receiver calibration and mode data signaling

Three phase and polarity encoded serial interface

Low-power mode signal bridge for optical media

Camera control interface extension bus

Three phase and polarity encoded serial interface

Multi-wire single-ended push-pull link with data symbol transition based clocking

Run-length detection and correction

Circuit to recover a clock signal from multiple wire data signals that changes state every state cycle and is immune to data inter-lane skew as well as data state transition glitches

Transcoding method for multi-wire signaling that embeds clock information in transition of signal state

Compact and fast N-factorial single data rate clock and data recovery circuits

Multi-wire single-ended push-pull link with data symbol transition based clocking

Three-phase-polarity safe reverse link shutdown

Efficient N-factorial differential signaling termination network

Clock and data recovery for multi-phase, multi-level encoding

N-phase polarity data transfer

N-phase phase and polarity encoded serial interface

Portable communication device having back-lighting and high key press noise margin

Pulse amplitude modulation (PAM) encoding for a communication bus

Simplified C-PHY high-speed reverse mode

Independent pair 3-phase eye sampling circuit

Protocol-assisted advanced low-power mode

Technique of link state detection and wakeup in power state oblivious interface

Multi-wire open-drain link with data symbol transition based clocking

Camera control interface extension bus

Multi-wire open-drain link with data symbol transition based clocking

Three phase clock recovery delay calibration

Driver architecture for multiphase and amplitude encoding transmitters

ANDERSON JON JAMES

Generating and implementing a signal protocol and interface for higher data rates

High data rate interface with improved link synchronization

High data rate interface apparatus and method

High data rate interface apparatus and method

Generating and implementing a signal protocol and interface for higher data rates

Generating and implementing a signal protocol and interface for higher data rates

High data rate interface with improved link synchronization

Determining a pre skew and post skew calibration data rate in a mobile display digital interface (MDDI) communication system

High data rate interface apparatus and method

High data rate interface apparatus and method

Method, system and computer program for driving a data signal in data interface communication data link

INTERDIGITAL TECH CORP

Digital synthesizer

Digital synthesizer