Inventor

WOLLBRINK CURTIS C

US26 patents

⚠️ This page may combine multiple inventors who share the name “WOLLBRINK CURTIS C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WOLLBRINK CURTIS C

IBM

Dynamically scalable queues for performance driven PCI express memory traffic

System and method of implementing multiple internal virtual channels based on a single external virtual channel

Integrated circuit and data processing system having a configurable cache directory for an accelerator

Versatile lane configuration using a PCIe PIE-8 interface

Pre-transmission data reordering for a serial interface

Peripheral component interconnect express (PCIe) ping in a switch-based environment

Peripheral component interconnect express (PCIe) ping in a switch-based environment

Memory mapped input/output bus address range translation

Broadcast for a distributed switch network

Low latency corrupt data tagging on a cross-chip link

Using a PCI standard hot plug controller to modify the hierarchy of a distributed switch

Bandwidth limiting on generated PCIe packets from debug source

Hierarchical to physical memory mapped input/output translation

Low latency corrupt data tagging on a cross-chip link

External settings that reconfigure the error handling behavior of a distributed PCIe switch

FREKING RONALD E

Versatile lane configuration using a PCIe PIe-8 interface

Using a PCI standard hot plug controller to modify the hierarchy of a distributed switch

Bandwidth limiting on generated PCIE packets from debug source

Transmitting retry request associated with non-posted command via response credit channel

External settings that reconfigure the error handling behavior of a distributed PCIe switch

ARMSTRONG WILLIAM J

Translating a requester identifier to a chip identifier

Hierarchical to physical bus translation

Physical to hierarchical bus translation

Moving ownership of a device between compute elements

ENGEBRETSEN DAVID R

Memory mapped input/output bus address range translation

NORDSTROM GREGORY M

Memory mapped input/output bus address range translation for virtual bridges