P

Inventor

BOJARSKI STEPHANIE A

US17 patents

Patents

17 patents
US11437283B2Sep 6, 2022

Backside contacts for semiconductor devices

INTEL CORP12 citations85
US11011693B2May 18, 2021

Integrated quantum circuit assemblies for cooling apparatus

INTEL CORP11 citations85
US11257738B2Feb 22, 2022

Vertically stacked transistor devices with isolation wall structures containing an electrical conductor

INTEL CORP3 citations73
US11348916B2May 31, 2022

Leave-behind protective layer having secondary purpose

INTEL CORP3 citations72
US11922274B1Mar 5, 2024

Quantum dot devices with side and center screening gates

INTEL CORP2 citations69
US11569231B2Jan 31, 2023

Non-planar transistors with channel regions having varying widths

INTEL CORP3 citations69
US11996408B2May 28, 2024

Leave-behind protective layer having secondary purpose

INTEL CORP0 citations62
US11699637B2Jul 11, 2023

Vertically stacked transistor devices with isolation wall structures containing an electrical conductor

INTEL CORP0 citations62
US11699747B2Jul 11, 2023

Quantum dot devices with multiple layers of gate metal

INTEL CORP1 citations62
US11682701B2Jun 20, 2023

Quantum dot devices

INTEL CORP0 citations62
US11658212B2May 23, 2023

Quantum dot devices with conductive liners

INTEL CORP0 citations62
US11616060B2Mar 28, 2023

Techniques for forming gate structures for transistors arranged in a stacked configuration on a single fin structure

INTEL CORP0 citations62
US10546772B2Jan 28, 2020

Self-aligned via below subtractively patterned interconnect

INTEL CORP1 citations62
US12230687B2Feb 18, 2025

Lateral gate material arrangements for quantum dot devices

INTEL CORP0 citations61
US11152254B2Oct 19, 2021

Pitch quartered three-dimensional air gaps

INTEL CORP0 citations61
US12080605B2Sep 3, 2024

Backside contacts for semiconductor devices

INTEL CORP1 citations60
US11424160B2Aug 23, 2022

Self-aligned local interconnects

INTEL CORP0 citations60