Inventor
MOSUR LOKPRAVEEN B
US19 patents
⚠️ This page may combine multiple inventors who share the name “MOSUR LOKPRAVEEN B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS6735712B1May 11, 2004
Dynamically configurable clocking scheme for demand based resource sharing with multiple clock crossing domains
INTEL CORP20 citations92
US6965970B2Nov 15, 2005
List based method and apparatus for selective and rapid cache flushes
INTEL CORP35 citations90
US11693691B2Jul 4, 2023
Systems, methods, and apparatuses for heterogeneous computing
INTEL CORP4 citations85
US6604162B1Aug 5, 2003
Snoop stall reduction on a microprocessor external bus
INTEL CORP17 citations84
US6434673B1Aug 13, 2002
Optimized configurable scheme for demand based resource sharing of request queues in a cache controller
INTEL CORP14 citations84
US11416281B2Aug 16, 2022
Systems, methods, and apparatuses for heterogeneous computing
INTEL CORP4 citations83
US11093277B2Aug 17, 2021
Systems, methods, and apparatuses for heterogeneous computing
INTEL CORP6 citations83
US6782455B2Aug 24, 2004
Optimized configurable scheme for demand based resource sharing of request queues in a cache controller
INTEL CORP6 citations73
US12135981B2Nov 5, 2024
Systems, methods, and apparatuses for heterogeneous computing
INTEL CORP1 citations72
US11651092B2May 16, 2023
Techniques to provide client-side security for storage of data in a network environment
INTEL CORP0 citations61
US11042657B2Jun 22, 2021
Techniques to provide client-side security for storage of data in a network environment
INTEL CORP1 citations61
US7266647B2Sep 4, 2007
List based method and apparatus for selective and rapid cache flushes
INTEL CORP0 citations50
US9697899B1Jul 4, 2017
Parallel deflate decoding method and apparatus
INTEL CORP1 citations49
US8373583B2Feb 12, 2013
Compression producing output exhibiting compression ratio that is at least equal to desired compression ratio
INTEL CORP0 citations49
US9830189B2Nov 28, 2017
Multi-threaded queuing system for pattern matching
INTEL CORP0 citations46
US10606841B2Mar 31, 2020
Technologies for an n-ary data compression decision engine
INTEL CORP0 citations38