Inventor
MUSSELMAN ROY GLENN
US15 patents
⚠️ This page may combine multiple inventors who share the name “MUSSELMAN ROY GLENN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
11 patentsUS5946472AAug 31, 1999
Apparatus and method for performing behavioral modeling in hardware emulation and simulation environments
IBM91 citations94
US7706275B2Apr 27, 2010
Method and apparatus for routing data in an inter-nodal communications lattice of a massively parallel computer system by employing bandwidth shells at areas of overutilization
IBM8 citations83
US7480611B2Jan 20, 2009
Method and apparatus to increase the usable memory capacity of a logic simulation hardware emulator/accelerator
IBM15 citations83
US6842728B2Jan 11, 2005
Time-multiplexing data between asynchronous clock domains within cycle simulation and emulation environments
IBM14 citations82
US6556936B2Apr 29, 2003
Method and apparatus for correlating trace data from asynchronous emulation machines
IBM13 citations79
US7839786B2Nov 23, 2010
Method and apparatus for routing data in an inter-nodal communications lattice of a massively parallel computer system by semi-randomly varying routing policies for different packets
IBM2 citations62
US7835284B2Nov 16, 2010
Method and apparatus for routing data in an inter-nodal communications lattice of a massively parallel computer system by routing through transporter nodes
IBM3 citations62
US7716036B2May 11, 2010
Method and apparatus to use clock bursting to minimize command latency in a logic simulation hardware emulator / accelerator
IBM2 citations62
US7437282B2Oct 14, 2008
Method and apparatus to provide alternative stimulus to signals internal to a model actively running on a logic simulation hardware emulator
IBM3 citations62
US8031614B2Oct 4, 2011
Method and apparatus for routing data in an inter-nodal communications lattice of a massively parallel computer system by dynamic global mapping of contended links
IBM1 citations51
US7337103B2Feb 26, 2008
Method and apparatus for the automatic correction of faulty wires in a logic simulation hardware emulator / accelerator
IBM1 citations51
GOODING THOMAS MICHAEL
2 patentsUS8874722B2Oct 28, 2014
Interactive tool for visualizing performance data in real-time to enable adaptive performance optimization and feedback
GOODING THOMAS MICHAEL16 citations81
US8443287B2May 14, 2013
Interactive tool for visualizing performance data in real-time to enable adaptive performance optimization and feedback
GOODING THOMAS MICHAEL8 citations81