P

Inventor

CARLOW EARL F

18 patents

Patents

18 patents
US4263650AApr 21, 1981

Digital data processing system with interface adaptor having programmable, monitorable control register therein

MOTOROLA INC94 citations95
US4004283AJan 18, 1977

Multiple interrupt microprocessor system

MOTOROLA INC68 citations95
US4087855AMay 2, 1978

Valid memory address enable system for a microprocessor system

MOTOROLA INC34 citations92
US4086627AApr 25, 1978

Interrupt system for microprocessor system

MOTOROLA INC35 citations92
US4016546AApr 5, 1977

Bus switch coupling for series-coupled address bus sections in a microprocessor

MOTOROLA INC36 citations92
US4010448AMar 1, 1977

Interrupt circuitry for microprocessor chip

MOTOROLA INC40 citations92
US4003028AJan 11, 1977

Interrupt circuitry for microprocessor chip

MOTOROLA INC36 citations92
US4218740AAug 19, 1980

Interface adaptor architecture

MOTOROLA INC54 citations90
US3979730ASep 7, 1976

Interface adaptor having control register

MOTOROLA INC29 citations82
US4090236AMay 16, 1978

N-channel field effect transistor integrated circuit microprocessor requiring only one external power supply

MOTOROLA INC25 citations81
US4040035AAug 2, 1977

Microprocessor having index register coupled to serial-coupled address bus sections and to data bus

MOTOROLA INC24 citations81
US4020472AApr 26, 1977

Master slave registers for interface adaptor

MOTOROLA INC28 citations81
US4069510AJan 17, 1978

Interrupt status register for interface adaptor chip

MOTOROLA INC15 citations74
US4037204AJul 19, 1977

Microprocessor interrupt logic

MOTOROLA INC14 citations73
US4032896AJun 28, 1977

Microprocessor having index register coupled to serial-coupled address bus sections and to data bus

MOTOROLA INC10 citations73
US4030079AJun 14, 1977

Processor including incrementor and program register structure

MOTOROLA INC11 citations73
US4145751AMar 20, 1979

Data direction register for interface adaptor chip

MOTOROLA INC19 citations70
US5611068AMar 11, 1997

Apparatus and method for controlling pipelined data transfer scheme between stages employing shift register and associated addressing mechanism

MOTOROLA INC5 citations60