Inventor
RIZZOLO RICHARD F
US14 patents
Patents
14 patentsUS6490702B1Dec 3, 2002
Scan structure for improving transition fault coverage and scan diagnostics
IBM72 citations93
US6662324B1Dec 9, 2003
Global transition scan based AC method
IBM22 citations92
US6453436B1Sep 17, 2002
Method and apparatus for improving transition fault testability of semiconductor chips
IBM26 citations92
US6442720B1Aug 27, 2002
Technique to decrease the exposure time of infrared imaging of semiconductor chips for failure analysis
IBM50 citations92
US5455931AOct 3, 1995
Programmable clock tuning system and method
IBM54 citations91
US5142167AAug 25, 1992
Encoding for simultaneous switching output noise reduction
IBM41 citations91
US6971054B2Nov 29, 2005
Method and system for determining repeatable yield detractors of integrated circuits
IBM36 citations90
US6532571B1Mar 11, 2003
Method to improve a testability analysis of a hierarchical design
IBM15 citations77
US9874917B2Jan 23, 2018
Adaptive power capping in a chip
IBM2 citations73
US6751765B1Jun 15, 2004
Method and system for determining repeatable yield detractors of integrated circuits
IBM10 citations69
US4760289AJul 26, 1988
Two-level differential cascode current switch masterslice
IBM18 citations69
US10048734B2Aug 14, 2018
Adaptive power capping in a chip
IBM0 citations52
US9733685B2Aug 15, 2017
Temperature-aware microprocessor voltage management
IBM1 citations52
US9575529B2Feb 21, 2017
Voltage droop reduction in a processor
IBM1 citations52