Inventor

KWAI DING-MING

TW26 patents

⚠️ This page may combine multiple inventors who share the name “KWAI DING-MING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KWAI DING-MING

IND TECH RES INST

Method and apparatus of an integrated circuit

3-D memory and built-in self-test circuit thereof

Wafer and method for improving yield rate of wafer

Apparatus and method for generating a power delivery network

Power source tolerance analysis method and system

Method for generating power distribution network (PDN) model, and power distribution network analysis method and device

Fault-tolerance through silicon via interface and controlling method thereof

Memory device

Isolation circuit

Stacked structure of chips

Test method for interposer

Die stacking structure and fabricating method thereof

Method of yield prejudgment and bump re-assignment and computer readable storage medium

Memory controlling method and memory system

CHOU YUNG-FA

Stacked structure and stacked method for three-dimensional chip

Method of chip repair by stacking a plurality of bad dies

Technology of memory repair after stacking of three-dimensional integrated circuit

Apparatus and method for repairing an integrated circuit

CHEN TING-SHENG

Hardwired switch of die stack and operating method of hardwired switch

Operating method of hardwired switch

TAIWAN SEMICONDUCTOR MFG CORP

High speed built-in self-test circuit for DRAMS

LIN CHANG TZU

Method and apparatus of an integrated circuit

WORLDWIDE SEMICONDUCTOR MFG

Built-in-self-test circuit for RAMBUS direct RDRAM

WU CHENG WEN

Method for testing through-silicon-via and the circuit thereof

NAT UNIV TSING HUA

Method for testing through-silicon-via

KWAI DING-MING

Semiconductor device stacked structure